Gyuseong Kang
According to our database1,
Gyuseong Kang
authored at least 10 papers
between 2015 and 2024.
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Bibliography
2024
14nm FinFET Node Embedded MRAM Technology for Automotive Non-Volatile RAM Applications with Endurance Over 1E12-Cycles.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
A 14nm 128Mb eMRAM Implemented with 17.88Mb/mm<sup>2</sup> at 0.60V for Auto-G1 Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-Of-Merit with 80MHz Read operation and 18.1Mb/mm² implementation at 0.64V.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
IEEE Trans. Computers, 2022
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
2018
Spin Orbit Torque Device based Stochastic Multi-bit Synapses for On-chip STDP Learning.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
A DRAM based physical unclonable function capable of generating >10<sup>32</sup> Challenge Response Pairs per 1Kbit array for secure chip authentication.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2015
A Refresh-Less eDRAM Macro With Embedded Voltage Reference and Selective Read for an Area and Power Efficient Viterbi Decoder.
IEEE J. Solid State Circuits, 2015