Gwanghyeon Baek

According to our database, Gwanghyeon Baek authored at least 3 papers between 2003 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia.

Daeyeon Kim, Yusung Kim, Ayush Shrivastava, Gyusung Park, Anandkumar Mahadevan Pillai, Kunal Bannore, Tri Doan, Muktadir Rahman, Gwanghyeon Baek, Clifford Ong, Xiaofei Wang, Zheng Guo, Eric Karl

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

Energy-Efficient High Bandwidth 6T SRAM Design on Intel 4 CMOS Technology.

Yusung Kim, Clifford Ong, Anandkumar Mahadevan Pillai, Harish Jagadeesh, Gwanghyeon Baek, Iqbal Rajwani, Zheng Guo, Eric Karl

IEEE J. Solid State Circuits, 2023

2003

Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic.

Ki-Whan Song, Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jaewoo Kyung, Gwanghyeon Baek, Chun-An Lee, Jong Duk Lee, Byung-Gook Park

Proceedings of the 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 2003