Guy Mazaré

According to our database1, Guy Mazaré authored at least 19 papers between 1973 and 2000.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2000
Rapid prototyping of an ATM programmable associative operator.
J. Syst. Archit., 2000

1998
An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture.
J. Electron. Test., 1998

1996
Toward reconfigurable associative architecture for high speed communication operators.
Proceedings of the IEEE Symposium and Workshop on Engineering of Computer Based Systems (ECBS'96), 1996

1995
Distributing code in a parallel fine grain machine using the actor model.
Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing (PDP '95), 1995

1994
Fault-Tolerant Routing Algorithms for a Massively Parallel Machine.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

Design and Test of a Massively Parallel Architecture.
Proceedings of the Massively Parallel Processing Applications and Develompent, 1994

1993
Memory testing in a massively parallel machine.
Microprocess. Microprogramming, 1993

RAP: a Fine Grain MIMD Machine.
Proceedings of the Parallel Computing: Trends and Applications, 1993

Functional Testing and Reconfiguration of MIMD Machines.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993

1991
A VLSI implementation of parallel image reconstruction.
CVGIP Graph. Model. Image Process., 1991

1990
A cellular architecture dedicated to neural net emulation.
Microprocessing and Microprogramming, 1990

A VLSI Asynchronous Cellular Architecture for Neural Computing: Functional Definition and Performance Evaluation.
Proceedings of the Third International Conference on Industrial and Engineering Applications of Artificial Intelligence and Expert Systems, IEA/AIE 1990, July 15-18, 1990, The Mills House Hotel, Charleston, SC, USA, 1990

Massively parallel architecture: application to neural net emulation and image reconstruction.
Proceedings of the Application Specific Array Processors, 1990

1988
An Integrated Asynchronous Cellular Array to Do Parallel Image Reconstruction.
Proceedings of IAPR Workshop on Computer Vision, 1988

An Integrated Highly Parallel Architecture for Image Reconstruction.
Proceedings of the Advances in Computer Graphics Hardware III (Eurographics'88 Workshop), 1988

1986
Computer Aided Design and Artificial Intelligence (Panel).
Proceedings of the Information Processing 86, 1986

1982
A design methodology based upon symbolic layout and integrated cad tools.
Proceedings of the 19th Design Automation Conference, 1982

1977
A Few Examples of How to Use a Symmetrical Multi-Micro-Processor.
Proceedings of the 4th Annual Symposium on Computer Architecture, 1977

1973
Projet SOCRATE - (8) Structure d'un système d'exploitation adapté à la base de données.
PhD thesis, 1973


  Loading...