Guy Durrieu

According to our database1, Guy Durrieu authored at least 16 papers between 1978 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
GRec: Automatic Computation of Reconfiguration Graphs for Multi-core Platforms.
ACM Trans. Embed. Comput. Syst., 2019

2018
Schedulability analysis for mixed critical cyber physical systems.
Proceedings of the IEEE Industrial Cyber-Physical Systems, 2018

2015
Test Languages for In-the-Loop Avionics Tests.
J. Aerosp. Inf. Syst., 2015

2013
A Meta-model for Tests of Avionics Embedded Systems.
Proceedings of the MODELSWARD 2013 - Proceedings of the 1st International Conference on Model-Driven Engineering and Software Development, Barcelona, Spain, 19, 2013

STELAE - A model-driven test development environment for avionics systems.
Proceedings of the 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013

2008
LETO - A Lustre-Based Test Oracle for Airbus Critical Systems.
Proceedings of the Formal Methods for Industrial Critical Systems, 2008

2004
Formal proof and test case generation for critical embedded systems using SCADE.
Proceedings of the Building the Information Society, 2004

1998
Helping the Automated Validation Process of User Interfaces Systems.
Proceedings of the Forging New Links, 1998

1996
Deriving a Formal Model of an Interactive System from its UIL Description in order to Verify and Test its Behaviour.
Proceedings of the Design, 1996

1994
Towards a multi-formalism framework for architectural synthesis: the ASAR project.
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994

1992
Transe: An Experimental Transformation Assistant for Digital Circuit Design.
Proceedings of the Designing Correct Circuits, 1992

1991
Transe: an experimental design tool.
Proceedings of the Algorithms and Parallel VLSI Architectures II, 1991

1989
MaRS, a Combinator Graph Reduction Multiprocessor.
Proceedings of the PARLE '89: Parallel Architectures and Languages Europe, 1989

1986
Mechanisms for Efficient Multiprocessor Combinator Reduction.
Proceedings of the 1986 ACM Conference on LISP and Functional Programming, 1986

Toward the design of a parallel graph reduction machine: The MaRS project.
Proceedings of the Graph Reduction, Proceedings of a Workshop, Santa Fé, New Mexico, USA, September 29, 1986

1978
Parallelism, control and synchronization expression in a single assignment language.
ACM SIGPLAN Notices, 1978


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