Gustavo Neuberger

According to our database1, Gustavo Neuberger authored at least 10 papers between 2003 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
Functional verification of logic modules for a Gigabit Ethernet switch.
Proceedings of the 12th Latin American Test Workshop, 2011

2009
Protecting digital circuits against hold time violation due to process variability.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

2007
Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies.
Proceedings of the VLSI-SoC: Advanced Topics on Systems on a Chip, 2007

Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies.
Proceedings of the IFIP VLSI-SoC 2007, 2007

2005
Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM.
RITA, 2005

An Automatic Technique for Optimizing Reed-Solomon Codes to Improve Fault Tolerance in Memories.
IEEE Des. Test Comput., 2005

TOC-BISR: A Self-Repair Scheme for Memories in Embedded Systems.
Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

2004
Designing Fault-Tolerant Techniques for SRAM-Based FPGAs.
IEEE Des. Test Comput., 2004

Designing and testing fault-tolerant techniques for SRAM-based FPGAs.
Proceedings of the First Conference on Computing Frontiers, 2004

2003
A multiple bit upset tolerant SRAM memory.
ACM Trans. Design Autom. Electr. Syst., 2003


  Loading...