Gururaj Saileshwar

According to our database, Gururaj Saileshwar authored at least 26 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2024

Probabilistic Tracker Management Policies for Low-Cost and Scalable Rowhammer Mitigation.

Aamer Jaleel, Stephen W. Keckler, Gururaj Saileshwar

CoRR, 2024

PrIDE: Achieving Secure Rowhammer Mitigation with Low-Cost In-DRAM Trackers.

Aamer Jaleel, Gururaj Saileshwar, Stephen W. Keckler, Moinuddin K. Qureshi

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

2023

The Mirage of Breaking MIRAGE: Refuting the HPCA-2023 Paper "Are Randomized Caches Truly Random?".

Gururaj Saileshwar, Moinuddin K. Qureshi

CoRR, 2023

The Mirage of Breaking MIRAGE: Analyzing the Modeling Pitfalls in Emerging "Attacks" on MIRAGE.

Gururaj Saileshwar, Moinuddin K. Qureshi

IEEE Comput. Archit. Lett., 2023

Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping.

Anurag Kar, Xueyang Liu, Yonghae Kim, Gururaj Saileshwar, Hyesoon Kim, Tushar Krishna

IEEE Comput. Archit. Lett., 2023

Practical Timing Side-Channel Attacks on Memory Compression.

Martin Schwarzl, Pietro Borrello, Gururaj Saileshwar, Hanna Müller, Michael Schwarz, Daniel Gruss

Proceedings of the 44th IEEE Symposium on Security and Privacy, 2023

SQUIP: Exploiting the Scheduler Queue Contention Side Channel.

Stefan Gast, Jonas Juffinger, Martin Schwarzl, Gururaj Saileshwar, Andreas Kogler, Simone Franza, Markus Köstl, Daniel Gruss

Proceedings of the 44th IEEE Symposium on Security and Privacy, 2023

Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems.

Jeonghyun Woo, Gururaj Saileshwar, Prashant J. Nair

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

PT-Guard: Integrity-Protected Page Tables to Defend Against Breakthrough Rowhammer Attacks.

Anish Saxena, Gururaj Saileshwar, Jonas Juffinger, Andreas Kogler, Daniel Gruss, Moinuddin K. Qureshi

Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Network, 2023

2022

Architecting Secure Processor Caches.

Gururaj Saileshwar

PhD thesis, 2022

HeapCheck: Low-cost Hardware Support for Memory Safety.

Gururaj Saileshwar, Rick Boivie, Tong Chen, Benjamin Segal, Alper Buyuktosunoglu

ACM Trans. Archit. Code Optim., 2022

AQUA: Scalable Rowhammer Mitigation by Quarantining Aggressor Rows at Runtime.

Anish Saxena, Gururaj Saileshwar, Prashant J. Nair, Moinuddin K. Qureshi

Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Hydra: enabling low-overhead mitigation of row-hammer at ultra-low thresholds via hybrid tracking.

Moinuddin K. Qureshi, Aditya Rohan, Gururaj Saileshwar, Prashant J. Nair

Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

On the Scalability of HeapCheck.

Rick Boivie, Gururaj Saileshwar, Tong Chen, Benjamin Segal, Alper Buyuktosunoglu

Proceedings of the 52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2022

Randomized row-swap: mitigating Row Hammer by breaking spatial correlation between aggressor and victim rows.

Gururaj Saileshwar, Bolin Wang, Moinuddin K. Qureshi, Prashant J. Nair

Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

2021

Mentoring Opportunities in Computer Architecture: Analyzing the Past to Develop the Future.

Elba Garza, Gururaj Saileshwar, Udit Gupta, Tianyi Liu, Abdulrahman Mahmoud, Saugata Ghose, Joel S. Emer

Proceedings of the ACM/IEEE Workshop on Computer Architecture Education, 2021

MIRAGE: Mitigating Conflict-Based Cache Attacks with a Practical Fully-Associative Design.

Gururaj Saileshwar, Moinuddin K. Qureshi

Proceedings of the 30th USENIX Security Symposium, 2021

Bespoke Cache Enclaves: Fine-Grained and Scalable Isolation from Cache Side-Channels via Flexible Set-Partitioning.

Gururaj Saileshwar, Sanjay Kariyappa, Moinuddin K. Qureshi

Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021

Hardware Support for Low-Cost Memory Safety.

Rick Boivie, Gururaj Saileshwar, Tong Chen, Benjamin Segal, Alper Buyuktosunoglu

Proceedings of the 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2021

Hardware Support to Improve Fuzzing Performance and Precision.

Ren Ding, Yonghae Kim, Fan Sang, Wen Xu, Gururaj Saileshwar, Taesoo Kim

Proceedings of the CCS '21: 2021 ACM SIGSAC Conference on Computer and Communications Security, Virtual Event, Republic of Korea, November 15, 2021

Streamline: a fast, flushless cache covert-channel attack by enabling asynchronous collusion.

Gururaj Saileshwar, Christopher W. Fletcher, Moinuddin K. Qureshi

Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2019

Lookout for Zombies: Mitigating Flush+Reload Attack on Shared Caches by Monitoring Invalidated Lines.

Gururaj Saileshwar, Moinuddin K. Qureshi

CoRR, 2019

CleanupSpec: An "Undo" Approach to Safe Speculation.

Gururaj Saileshwar, Moinuddin K. Qureshi

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2018

Morphable Counters: Enabling Compact Integrity Trees For Low-Overhead Secure Memories.

Gururaj Saileshwar, Prashant J. Nair, Prakash Ramrakhyani, Wendy Elsasser, José A. Joao, Moinuddin K. Qureshi

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

SYNERGY: Rethinking Secure-Memory Design for Error-Correcting Memories.

Gururaj Saileshwar, Prashant J. Nair, Prakash Ramrakhyani, Wendy Elsasser, Moinuddin K. Qureshi

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2011

CMOS low-noise signal conditioning with a novel differential "resistance to frequency" converter for resistive sensor applications.

Priyanka Kabara, Sanket Thakur, Gururaj Saileshwar, Maryam Shojaei Baghini, Dinesh Kumar Sharma

Proceedings of the International SoC Design Conference, 2011