Gürtaç Yemisçioglu

According to our database, Gürtaç Yemisçioglu authored at least 5 papers between 2012 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

A Novel Multiplier Hardware Organization for Finite Fields Defined by All-One Polynomials.

Shima Mohaghegh, Satoshi Kondo, Gürtaç Yemisçioglu, Ali Muhtaroglu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Design of Efficient AI Accelerator Building Blocks in Quantum-Dot Cellular Automata (QCA).

Ahmed Mamdouh, Mbonea Mjema, Gürtaç Yemisçioglu, Satoshi Kondo, Ali Muhtaroglu

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

2020

Low-Power and Area-Efficient Finite Field Multiplier Architecture Based on Irreducible All-One Polynomials.

Shima Mohaghegh, Gürtaç Yemisçioglu, Ali Muhtaroglu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2015

Very-large-scale integration implementation of a 16-bit clocked adiabatic logic logarithmic signal processor.

Gürtaç Yemisçioglu, P. Lee

IET Comput. Digit. Tech., 2015

2012

16-Bit Clocked Adiabatic Logic (CAL) logarithmic signal processor.

Gürtaç Yemisçioglu, Peter Lee

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012