Gursharan Reehal

According to our database1, Gursharan Reehal authored at least 5 papers between 2010 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
A Systematic Design Methodology for Low-Power NoCs.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2011
Layout-aware high performance interconnects for Network-on-Chip design in deep nanometer technologies.
Proceedings of the 6th IEEE International Design and Test Workshop, 2011

2010
Industry-Oriented Laboratory Development for Mixed-Signal IC Test Education.
IEEE Trans. Educ., 2010

Power analysis for Asynchronous CLICHÉ Network-on-Chip.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

An industry-driven laboratory development for mixed-signal IC test education.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010


  Loading...