Günter Knittel

According to our database1, Günter Knittel authored at least 30 papers between 1993 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
EraΣer: A Compact FPGA-TDC Design.
Proceedings of the 5th International Conference on Event-Based Control, 2019

A Novel Encoder for TDCs.
Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2010
A Parallel Preconditioned Conjugate Gradient Solver for the Poisson Problem on a Multi-GPU Platform.
Proceedings of the 18th Euromicro Conference on Parallel, 2010

A CG-based Poisson solver on a GPU-cluster.
Proceedings of the 2010 International Conference on High Performance Computing, 2010

2009
Giga-Voxel Rendering from Compressed Data on a Display Wall.
J. WSCG, 2009

PCA-based Seeding for Improved Vector Quantization.
Proceedings of the IMAGAPP 2009, 2009

2008
Integrating Logic Analyzer Functionality into VHDL Designs.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Pipelined Bus-Invert Coding for FPGAs Driving High-Speed DDR-Channels.
Proceedings of the Fifth International Conference on Information Technology: New Generations (ITNG 2008), 2008

2007
On the Design of a Parallel Link Using Rigid-Flex PCB Technology.
Proceedings of the Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2007

A Compact Shader for FPGA-Based Volume Rendering Accelerators.
Proceedings of the Reconfigurable Computing: Architectures, 2007

2003
Introduction.
Comput. Graph., 2003

An Architecture for Hierarchical Collision Detection.
Proceedings of the 11-th International Conference in Central Europe on Computer Graphics, 2003

2002
Using pre-integrated Transfer Functions in an Interactive Software System for Volume.
Proceedings of the 23rd Annual Conference of the European Association for Computer Graphics, 2002

2000
The ULTRAVIS system.
Proceedings of the Proceeding of the 2000 Volume Visualization and Graphics Symposium, 2000

1999
TRIANGLECASTER Extensions To 3BTexturing Units For Accelerated Volume Rendering.
Proceedings of the 1999 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, 1999

1997
VIZARD - Visualization Accelerator for Realtime Display.
Proceedings of the 1997 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, 1997

Verfahren und Schaltungseinheiten für Hochleistungsgraphik und Visualisierung.
PhD thesis, 1997

1996
Texram: a smart memory for texturing.
IEEE Computer Graphics and Applications, 1996

Hardware for superior texture performance.
Comput. Graph., 1996

Real-Time Accelerators for Volume Rendering.
Proceedings of the 7th IEEE Visualization Conference, 1996

A Parallel Algorithm for Scientific Visualization.
Proceedings of the 1996 International Conference on Parallel Processing, 1996

A PCI-compatible FPGA-coprocessor for 2D/3D image processing.
Proceedings of the 4th IEEE Symposium on FPGAs for Custom Computing Machines (FCCM '96), 1996

1995
Three Architectures for Volume Rendering.
Comput. Graph. Forum, 1995

A scalable architecture for volume rendering.
Comput. Graph., 1995

A VLSI-design for fast vector normalization.
Comput. Graph., 1995

A Compact Volume Rendering Accelerator.
Proceedings of the 1994 Symposium on Volume Visualization, 1995

High-Speed Volume Rendering Using Redundant Block Compression.
Proceedings of the 6th IEEE Visualization Conference, 1995

A pel-based Volume Rendering Accelerator.
Proceedings of the EGGH95: Tenth Eurographics Workshop on Graphics Hardware 1995, 1995

Eliminating the Z-Buffer bottleneck.
Proceedings of the 1995 European Design and Test Conference, 1995

1993
VERVE: Voxel Engine for Real-time Visualization and Examination.
Comput. Graph. Forum, 1993


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