Gunter Fischer
According to our database1,
Gunter Fischer
authored at least 23 papers
between 2003 and 2024.
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Bibliography
2024
Jitter Minimization of Phase-locked Loops for OFDM-Based Millimeter-Wave Communication Systems with Beam Steering.
Proceedings of the 31st International Conference on Mixed Design of Integrated Circuits and System , 2024
2023
Random and Static Phase Errors in a PLL Array for Millimeter-Wave Frequency Generation.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
2022
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022
2021
A novel approach to fractional-N PLLs generating ultra-fast low-noise chirps for FMCW radar.
Integr., 2021
2019
A Study of Phase Noise and Frequency Error of a Fractional-N PLL in the Course of FMCW Chirp Generation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A Low Power, Low Chip Area, Two-stage Current-mode DAC Implemented in CMOS 130 nm Technology.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
2018
A 0.48 mW fully integrated MICS band VCO in SiGe BiCMOS technology for medical implant communication.
Proceedings of the 2018 IEEE Radio and Wireless Symposium, 2018
A Radiation Hardened 16 GS/s Arbitrary Waveform Generator IC for a Submillimeter Wave Chirp-Transform Spectrometer.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
A Low-Power Injection-Locked VCO for an Implantable MICS Band Transmitter with Wireless Frequency Reference and Tune-while-Lock Channel Calibration.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018
2017
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017
2016
23.5 A dual 64Gbaud 10kΩ 5% THD linear differential transimpedance amplifier with automatic gain control in 0.13µm BiCMOS technology for optical fiber coherent receivers.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
Low chip area, low power dissipation, programmable, current mode, 10-bits, SAR ADC implemented in the CMOS 130nm technology.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
2014
A 32 GSps multiplexer with 1 kbit memory for arbitrary signal generation for testing digital-to-analogue converters.
IET Circuits Devices Syst., 2014
2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
A low power 6.2-8.3 GHz frequency synthesizer in SiGe BiCMOS for IEEE802.15.4a standard.
Proceedings of the International Symposium on Signals, Systems, and Electronics, 2012
Proceedings of the International SoC Design Conference, 2012
Board implementation and its performance for IR-UWB IEEE.802.15.4a from multiple ASIC chips.
Proceedings of the European Wireless 2012, 2012
2011
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011
Proceedings of EUROCON 2011, 2011
2010
Proceedings of the 2010 International Conference on Indoor Positioning and Indoor Navigation, 2010
2008
Time-of-Arrival measurement extension to a non-coherent impulse radio UWB transceiver.
Proceedings of the 5th Workshop on Positioning, Navigation and Communication, 2008
2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
2003
IEEE J. Solid State Circuits, 2003