Günhan Dündar
Orcid: 0000-0003-2044-2706
According to our database1,
Günhan Dündar
authored at least 131 papers
between 1995 and 2024.
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Online presence:
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Bibliography
2024
Microelectron. J., 2024
2023
Integr., May, 2023
Proceedings of the 19th International Conference on Synthesis, 2023
Proceedings of the 19th International Conference on Synthesis, 2023
A Novel Area Efficient Inductorless Super-Regenerative Receiver Front-End for Medical Brain Implants.
Proceedings of the 19th International Conference on Synthesis, 2023
Programmable Switched-Capacitor Filter Design Tool for Biomedical Signal Acquisition.
Proceedings of the 19th International Conference on Synthesis, 2023
Proceedings of the 19th International Conference on Synthesis, 2023
2022
Integr., 2022
Proceedings of the 18th International Conference on Synthesis, 2022
An Efficient Hierarchical Approach for Synthesis of Multi-Stage Wide-Band Amplifiers.
Proceedings of the 18th International Conference on Synthesis, 2022
Proceedings of the 18th International Conference on Synthesis, 2022
Proceedings of the 30th Signal Processing and Communications Applications Conference, 2022
2021
Deep learning aided efficient yield analysis for multi-objective analog integrated circuit synthesis.
Integr., 2021
Review: Machine learning techniques in analog/RF integrated circuit design, synthesis, layout, and test.
Integr., 2021
2020
Yield-aware multi-objective optimization of a MEMS accelerometer system using QMC-based methodologies.
Microelectron. J., 2020
Proceedings of the 43rd International Conference on Telecommunications and Signal Processing, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Improving POF Quality in Multi Objective Optimization of Analog ICs via Deep Learning.
Proceedings of the European Conference on Circuit Theory and Design, 2020
2019
On Chip Reconfigurable CMOS Analog Circuit Design and Automation Against Aging Phenomena: Sense and React.
ACM Trans. Design Autom. Electr. Syst., 2019
Analysis, modeling and design of a CMOS Super-Regenerative Receiver for implanted medical devices under square and sinusoidal quench signals.
Integr., 2019
A comprehensive analysis on differential cross-coupled CMOS LC oscillators via multi-objective optimization.
Integr., 2019
IET Circuits Devices Syst., 2019
Proceedings of the 16th International Conference on Synthesis, 2019
Proceedings of the 16th International Conference on Synthesis, 2019
Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing.
Proceedings of the 16th International Conference on Synthesis, 2019
Distance and Power based Experimental Verification of Channel Model in Visible Light Communication.
Proceedings of the 27th Signal Processing and Communications Applications Conference, 2019
Design and Comparison of Low Power Pulse Combining IR-UWB Transmitters in 180nm CMOS.
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019
2018
Analog behavioral equivalence boundary computation under the effect of process variations.
Integr., 2018
A novel equivalent circuit model for split ring resonator with an application of low phase noise reference oscillator.
Integr., 2018
A novel design methodology for the mixed-domain optimization of a MEMS accelerometer.
Integr., 2018
Integr., 2018
Proceedings of the 15th International Conference on Synthesis, 2018
Design Space Exploration of CMOS Cross-Coupled LC Oscillators via RF Circuit Synthesis.
Proceedings of the 15th International Conference on Synthesis, 2018
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018
2017
IEEE Trans. Circuits Syst. II Express Briefs, 2017
A standard cell phase locked loop design, analysis and high-level synthesis tool (CellPLL).
Integr., 2017
Aging signature properties and an efficient signature determination tool for online monitoring.
Integr., 2017
A 0.65-1.35 GHz synthesizable all-digital phase locked loop with quantization noise suppressing time-to-digital converter.
Turkish J. Electr. Eng. Comput. Sci., 2017
Turkish J. Electr. Eng. Comput. Sci., 2017
Proceedings of the 14th International Conference on Synthesis, 2017
Proceedings of the 14th International Conference on Synthesis, 2017
Proceedings of the 14th International Conference on Synthesis, 2017
Proceedings of the 14th International Conference on Synthesis, 2017
Proceedings of the 14th International Conference on Synthesis, 2017
Proceedings of the New Generation of CAS, 2017
2016
Microelectron. J., 2016
An analog behavioral equivalence boundary search methodology for simulink models and circuit level designs utilizing evolutionary computation.
Integr., 2016
Comparison of QMC-based yield-aware pareto front techniques for multi-objective robust analog synthesis.
Integr., 2016
Integr., 2016
Proceedings of the 13th International Conference on Synthesis, 2016
Proceedings of the 13th International Conference on Synthesis, 2016
Proceedings of the 13th International Conference on Synthesis, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016
2015
IEEE Trans. Biomed. Circuits Syst., 2015
Enhanced challenge-response set and secure usage scenarios for ordering-based ring oscillator-physical unclonable functions.
IET Circuits Devices Syst., 2015
Comput. Secur., 2015
Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
A synthesizable Time to Digital Converter (TDC) with MIMO spatial oversampling method.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
A high resolution and low jitter linear delay line for IR-UWB template pulse synchronization.
Proceedings of the European Conference on Circuit Theory and Design, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
IEEE Trans. Computers, 2014
Reliability assessment of CMOS differential cross-coupled LC oscillators and a novel on chip self-healing approach against aging phenomena.
Microelectron. Reliab., 2014
Integr., 2014
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
Analysis of Ring Oscillator structures to develop a design methodology for RO-PUF circuits.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Random number generation using field programmable analog array implementation of logistic map.
Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013
Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013
Proceedings of the East-West Design & Test Symposium, 2013
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
An Optically Powered CMOS Receiver System for Intravascular Magnetic Resonance Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Proceedings of the 20th Signal Processing and Communications Applications Conference, 2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
2011
Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm.
Integr., 2011
Proceedings of the 34th International Conference on Telecommunications and Signal Processing (TSP 2011), 2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Integr., 2009
2008
Computing Gradient Vector and Jacobian Matrix in Arbitrarily Connected Neural Networks.
IEEE Trans. Ind. Electron., 2008
IEEE Trans. Ind. Electron., 2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
2007
A coefficient optimization and architecture selection tool for SD modulators considering component non-idealities.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
Interactive presentation: A coefficient optimization and architecture selection tool for SigmaDelta modulators in MATLAB.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Scaling Input Signal Swings of Overloaded Integrators in Resonator-based Sigma-Delta Modulators.
Proceedings of the 13th IEEE International Conference on Electronics, 2006
2005
Design of Digital Filters for Low Power Applications Using Integer Quadratic Programming.
Proceedings of the Integrated Circuit and System Design, 2005
Performance estimator for an analog design automation system using EKV-modeled analog circuits.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
2004
Proceedings of the 6th NASA / DoD Workshop on Evolvable Hardware (EH 2004), 2004
2003
An evolutionary approach to automatic synthesis of high-performance analog integrated circuits.
IEEE Trans. Evol. Comput., 2003
2002
Evolution-based design of neural fuzzy networks using self-adapting genetic parameters.
IEEE Trans. Fuzzy Syst., 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Comput. Commun., 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Proceedings of the Artificial Neural Networks, 2001
2000
Implementation of a New Orthogonal Shuffled Block Transform for Image Coding Applications.
Real Time Imaging, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
Multiplierless Realization of Linear DSP Transforms by Using Common Two-Term Expressions.
J. VLSI Signal Process., 1999
Statistical methods for the estimation of quantization effects in FIR-based multirate systems.
IEEE Trans. Signal Process., 1999
1998
IEEE Trans. Neural Networks, 1998
Incorporating MOS Transistor Mismatches into Training of Analog Neural Networks.
Proceedings of the International ICSC / IFAC Symposium on Neural Computation (NC 1998), 1998
1996
Neural Comput., 1996
1995
IEEE Trans. Neural Networks, 1995