Gulay Yalcin
According to our database1,
Gulay Yalcin
authored at least 26 papers
between 2007 and 2021.
Collaborative distances:
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Bibliography
2021
ACM Comput. Surv., 2021
2019
2017
Proceedings of the 17th IEEE/ACM International Symposium on Cluster, 2017
2016
Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
A Runtime Heuristic to Selectively Replicate Tasks for Application-Specific Reliability Targets.
Proceedings of the 2016 IEEE International Conference on Cluster Computing, 2016
2015
ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers.
Microprocess. Microsystems, 2015
JSRAM: A Circuit-Level Technique for Trading-Off Robustness and Capacity in Cache Memories.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the Transactional Memory. Foundations, Algorithms, Tools, and Applications, 2015
2014
PhD thesis, 2014
ACM Trans. Archit. Code Optim., 2014
Microprocess. Microsystems, 2014
Proceedings of the ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, 2014
Combining Error Detection and Transactional Memory for Energy-Efficient Computing below Safe Operation Margins.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
System-level power & energy estimation methodology and optimization techniques for CPU-GPU based mobile platforms.
Proceedings of the 12th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
Proceedings of the High Performance Computing - First HPCLATAM, 2014
2013
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Fault tolerance for multi-threaded applications by leveraging hardware transactional memory.
Proceedings of the Computing Frontiers Conference, 2013
2012
Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
2011
Proceedings of the IEEE 29th International Conference on Computer Design, 2011
SymptomTM: Symptom-Based Error Detection and Recovery Using Hardware Transactional Memory.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011
2007
IEEE Comput. Archit. Lett., 2007