Guilei Wang

According to our database, Guilei Wang authored at least 4 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Vertical Surrounding Gate Transistor for High Density and Low Voltage Operation in DRAM.

Wenqi Wang, Sang Don Yi, Fu Li, Qingchen Cao, Jiangliu Shi, Bok-Moon Kang, Meichen Jin, Chang Liu, Zhenhua Wu, Guilei Wang, Chao Zhao

IEEE Access, 2024

2023

A 3D Stackable 1T1C DRAM: Architecture, Process Integration and Circuit Simulation.

Meng Huang, Shufang Si, Zheng He, Ying Zhou, Sijia Li, Hong Wang, Jinying Liu, Dongsheng Xie, Mengmeng Yang, Kang You, Chris Choi, Yi Tang, Xiaojie Li, Shibing Qian, Xiaodong Yang, Long Hou, Weiping Bai, Zhongming Liu, Yanzhe Tang, Qiong Wu, Yanqin Wang, Tao Dou, Jake Kim, Guilei Wang, Jie Baisp, Adachi Takao, Chao Zhao, Abraham Yoo

Proceedings of the IEEE International Memory Workshop, 2023

Dielectric Relaxation Performance of DRAM Storage Capacitors and Ways of Improvement.

Z. Asher Bai, Yixian Wang, Lixue Liu, Xi Zhang, Feng Yuan, Junsheng Meng, Zhongming Liu, Js Jeon, James Cho, Blacksmith Wu, Huihui Li, Guilei Wang, Chao Zhao, Kanyu Cao

Proceedings of the IEEE International Memory Workshop, 2023

2022

Scaling Dual-Gate Ultra-thin a-IGZO FET to 30 nm Channel Length with Record-high Gm, max of 559 µS/µm at VDS=1 V, Record-low DIBL of 10 mV/V and Nearly Ideal SS of 63 mV/dec.

Kaifei Chen, Jiebin Niu, Guanhua Yang, Menggan Liu, Wendong Lu, Fuxi Liao, Kailiang Huang, XinLv Duan, Congyan Lu, Jiawei Wang, Lingfei Wang, Mengmeng Li, Di Geng, Chao Zhao, Guilei Wang, Nianduan Lu, Ling Li, Ming Liu

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022