Guido Groeseneken

Proceedings of the IEEE International Reliability Physics Symposium, 2022

Wafer-Level Aging of InGaAs/GaAs Nano-Ridge p-i-n Diodes Monolithically Integrated on Silicon.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021

Physics-based device aging modelling framework for accurate circuit reliability assessment.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2021

The properties, effect and extraction of localized defect profiles from degraded FET characteristics.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2021

Understanding the memory window in 1T-FeFET memories: a depolarization field perspective.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Memory Workshop, 2021

2020

The Influence of Gate Bias on the Anneal of Hot-Carrier Degradation.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019

Accelerated Capture and Emission (ACE) Measurement Pattern for Efficient BTI Characterization and Modeling.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2019

Full (Vg, Vd) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2019

Monolithically integrated GaN power ICs designed using the MIT virtual source GaNFET (MVSG) compact model for enhancement-mode p-GaN gate power HEMTs, logic transistors and resistors.

[BibT_eX]

[DOI]

Proceedings of the 49th European Solid-State Device Research Conference, 2019

Experimental calibration of the temperature dependence of the heterojunction bandgap in III-V tunneling devices.

[BibT_eX]

[DOI]

Proceedings of the Device Research Conference, 2019

Tunnel FETs using Phosphorene/ReS2 heterostructures.

[BibT_eX]

[DOI]

Proceedings of the Device Research Conference, 2019

2018

A Cautionary Note When Looking for a Truly Reconfigurable Resistive RAM PUF.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2018

Investigation of the endurance of FE-HfO2 devices by means of TDDB studies.

[BibT_eX]

[DOI]

Mihaela Ioana Popovici

Jan Van Houdt

Proceedings of the IEEE International Reliability Physics Symposium, 2018

A multi-bit/cell PUF using analog breakdown positions in CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2018

Impact of calibrated band-tails on the subthreshold swing of pocketed TFETs.

[BibT_eX]

[DOI]

Proceedings of the 76th Device Research Conference, 2018

2017

Will Chips of the Future Learn How to Feel Pain and Cure Themselves?

[BibT_eX]

[DOI]

Francky Catthoor

Cesar J. Lockhart de la Rosa

IEEE Des. Test, 2017

ESD characterisation of a-IGZO TFTs on Si and foil substrates.

[BibT_eX]

[DOI]

Proceedings of the 47th European Solid-State Device Research Conference, 2017

From planar to vertical capacitors: A step towards ferroelectric V-FeFET integration.

[BibT_eX]

[DOI]

Karine Florent

Simone Lavizzari

Luca Di Piazza

Mihaela Ioana Popovici

Proceedings of the 47th European Solid-State Device Research Conference, 2017

Tunneling transistors based on MoS2/MoTe2 Van der Waals heterostructures.

[BibT_eX]

[DOI]

Yashwanth Balaji

Quentin Smets

Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016

Non-uniform strain in lattice-mismatched heterostructure tunnel field-effect transistors.

[BibT_eX]

[DOI]

Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015

Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes.

[BibT_eX]

[DOI]

Sharifah Wan Muhamad Hatta

Microprocess. Microsystems, 2015

Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Characterization of time-dependent variability using 32k transistor arrays in an advanced HK/MG technology.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

The relationship between border traps characterized by AC admittance and BTI in III-V MOS devices.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Origins and implications of increased channel hot carrier variability in nFinFETs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

ESD characterization of planar InGaAs devices.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Four point probe ramped voltage stress as an efficient method to understand breakdown of STT-MRAM MgO tunnel junctions.

[BibT_eX]

[DOI]

Simon Van Beek

Koen Martens

Philippe Roussel

Gabriele Luca Donadio

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Impact of time-dependent variability on the yield and performance of 6T SRAM cells in an advanced HK/MG technology.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

ESD protection diodes in optical interposer technology.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

The defect-centric perspective of device and circuit reliability - From individual defects to circuits.

[BibT_eX]

[DOI]

Proceedings of the 45th European Solid State Device Research Conference, 2015

Engineering of a TiN\Al2O3\(Hf, Al)O2\Ta2O5\Hf RRAM cell for fast operation at low current.

[BibT_eX]

[DOI]

Proceedings of the 45th European Solid State Device Research Conference, 2015

Characterization and simulation methodology for time-dependent variability in advanced technologies.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits.

[BibT_eX]

[DOI]

Vinicius V. A. Camargo

IEEE Trans. Very Large Scale Integr. Syst., 2014

Stability evaluation of Au-free Ohmic contacts on AlGaN/GaN HEMTs under a constant current stress.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2014

Physical origin of current collapse in Au-free AlGaN/GaN Schottky Barrier Diodes.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2014

Energy distribution of positive charges in high-k dielectric.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2014

Determination of energy and spatial distribution of oxide border traps in In0.53Ga0.47As MOS capacitors from capacitance-voltage characteristics measured at various temperatures.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2014

Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology.

[BibT_eX]

[DOI]

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Impact of etch stop layer on negative bias illumination stress of amorphous Indium Gallium Zinc Oxide transistors.

[BibT_eX]

[DOI]

Ajay Bhoolokam

Manoj Nag

Proceedings of the 44th European Solid State Device Research Conference, 2014

NBTI Aging on 32-Bit Adders in the Downscaling Planar FET Technology Nodes.

[BibT_eX]

[DOI]

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013

Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2013

Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors.

[BibT_eX]

[DOI]

Proceedings of the European Solid-State Device Research Conference, 2013

Reliability challenges of real-time systems in forthcoming technology nodes.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

Quasi-3D method: Time-efficient TCAD and mixed-mode simulations on finFET technologies.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2012

Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Defect-centric perspective of time-dependent BTI variability.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2012

BTI reliability of ultra-thin EOT MOSFETs for sub-threshold logic.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2012

Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on IC Design & Technology, 2012

Analysis of the effect of cell parameters on the maximum RRAM array size considering both read and write.

[BibT_eX]

[DOI]

Proceedings of the 2012 European Solid-State Device Research Conference, 2012

Low-frequency noise assessment of the transport mechanisms in SiGe channel bulk FinFETs.

[BibT_eX]

[DOI]

Proceedings of the 2012 European Solid-State Device Research Conference, 2012

Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks.

[BibT_eX]

[DOI]

Proceedings of the 2012 European Solid-State Device Research Conference, 2012

Impact of Duty Factor, Stress Stimuli, and Gate Drive Strength on Gate Delay Degradation with an Atomistic Trap-Based BTI Model.

[BibT_eX]

[DOI]

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011

Positive bias temperature instabilities on sub-nanometer EOT FinFETs.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2011

Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Impact of design factors and environment on the ESD sensitivity of MEMS micromirrors.

[BibT_eX]

[DOI]

Sandeep Sangameswaran

Jeroen De Coster

Ingrid De Wolf

Microelectron. Reliab., 2010

Identifying the Bottlenecks to the RF Performance of FinFETs.

[BibT_eX]

[DOI]

Vaidyanathan Subramanian

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

2009

ESD On-Wafer Characterization: Is TLP Still the Right Measurement Tool?

[BibT_eX]

[DOI]

Mirko Scholz

Dimitri Linten

Steven Thijs

Sandeep Sangameswaran

IEEE Trans. Instrum. Meas., 2009

A plug-and-play wideband RF circuit ESD protection methodology: T-diodes.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2009

A CMOS circuit for evaluating the NBTI over a wide frequency range.

[BibT_eX]

[DOI]

R. Fernández-García

Ben Kaczer

Microelectron. Reliab., 2009

2008

Editorial.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2008

Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies.

[BibT_eX]

[DOI]

Javier Martín-Martínez

Proceedings of the Design, Automation and Test in Europe, 2008

Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

Transient voltage overshoot in TLP testing - Real or artifact?

[BibT_eX]

[DOI]

Microelectron. Reliab., 2007

NBTI reliability of Ni FUSI/HfSiON gates: Effect of silicide phase.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2007

Reliability screening of high-k dielectrics based on voltage ramp stress.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2007

Gate oxide breakdown in FET devices and circuits: From nanoscale physics to system-level reliability.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2007

Negative bias temperature instabilities in HfSiO(N)-based MOSFETs: Electrical characterization and modeling.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2007

FinFET technology for analog and RF circuits.

[BibT_eX]

[DOI]

Bertrand Parvais

Vaidyanathan Subramanian

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006

Implementation of plug-and-play ESD protection in 5.5GHz 90nm RF CMOS LNAs - Concepts, constraints and solutions.

[BibT_eX]

[DOI]

Steven Thijs

M. Natarajan Iyer

Dimitri Linten

Wutthinan Jeamsaksiri

Microelectron. Reliab., 2006

FinFET and MOSFET preliminary comparison of gate oxide reliability.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2006

2005

ESD circuit model based protection network optimisation for extended-voltage NMOS drivers.

[BibT_eX]

[DOI]

Vesselin K. Vassilev

Vladislav A. Vashchenko

Philippe Jansen

Marcel ter Beek

Microelectron. Reliab., 2005

ESD-RF co-design methodology for the state of the art RF-CMOS blocks.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2005

Layout dependency induced deviation from Poisson area scaling in BEOL dielectric reliability.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2005

RF ESD protection strategies - the design and performance trade-off challenges.

[BibT_eX]

[DOI]

Vladislav A. Vashchenko

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits.

[BibT_eX]

[DOI]

Vesselin K. Vassilev

Vladislav A. Vashchenko

Microelectron. Reliab., 2004

Evidence for source side injection hot carrier effects on lateral DMOS transistors.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2004

2003

High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2003

2002

Significance of the failure criterion on transmission line pulse testing.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2002

Analysis and modeling of a digital CMOS circuit operation and reliability after gate oxide breakdown: a case study.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2002

Statistical aspects of the degradation of LDD nMOSFETs.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2002

2001

A new degradation model and lifetime extrapolation technique for lightly doped drain nMOSFETs under hot-carrier degradation.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2001

Influence of gate length on ESD-performance for deep submicron CMOS technology.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2001

1999

Cost-effective cleaning and high-quality thin gate oxides.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 1999

1998

Novel level-identifying circuit for flash multilevel memories.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 1998

1989

Analysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits.

[BibT_eX]

[DOI]

Johan S. Witters