Guang Zhu

Proceedings of the Cross-Cultural Design. Applications in Learning, Arts, Cultural Heritage, Creative Industries, and Virtual Reality, 2022

2021

A 0.25-0.4-V, Sub-0.11-mW/GHz, 0.15-1.6-GHz PLL Using an Offset Dual-Path Architecture With Dynamic Charge Pumps.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2021

Dynamic power optimization of pilot and data for downlink OFDMA systems.

[BibT_eX]

[DOI]

J. Commun. Networks, 2021

A Novel Pythagorean Group Decision-Making Method Based on Evidence Theory and Interactive Power Averaging Operator.

[BibT_eX]

[DOI]

Complex., 2021

2020

A 0.65-V 12-16-GHz Sub-Sampling PLL With 56.4-fs<sub>rms</sub> Integrated Jitter and -256.4-dB FoM.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2020

A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Self-Biased PLL-Based Multiphase Clock Generator.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2020

2019

A 0.25-0.4V, Sub-0.11mW/GHz, 0.15-1.6GHz PLL Using an Offset Dual-Path Loop Architecture with Dynamic Charge Pumps.

[BibT_eX]

[DOI]

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 52-Gb/s Sub-1pJ/bit PAM4 Receiver in 40-nm CMOS for Low-Power Interconnects.

[BibT_eX]

[DOI]

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 0.65V 12-to-16GHz Sub-Sampling PLL with 56.4fsrms Integrated Jitter and -256.4dB FoM.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 32-Gb/s 0.46-pJ/bit PAM4 CDR Using a Quarter-Rate Linear Phase Detector and a Low-Power Multiphase Clock Generator.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2017

计算最终线性秩函数的新方法 (New Method for Computing Eventual Linear Ranking Functions).

[BibT_eX]

[DOI]

Yi Li

Wenyuan Wu

计算机科学, 2017

A New Type of Self Driven Door Handle.

[BibT_eX]

[DOI]

Int. J. Softw. Sci. Comput. Intell., 2017

EMI common-mode (CM) noise suppression from self-calibration of high-speed SST driver using on-chip process monitoring circuit.

[BibT_eX]

[DOI]

Khawaja Qasim Maqbool

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A low-power PAM4 receiver using 1/4-rate sampling decoder with adaptive variable-gain rectification.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

Self-powered intelligent door handle based on triboelectric nanogenerator.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Cognitive Informatics & Cognitive Computing, 2017

2016

A landmark calibration-based IP geolocation approach.

[BibT_eX]

[DOI]

EURASIP J. Inf. Secur., 2016

The L-Depth Eventual Linear Ranking Functions for Single-Path Linear Constraint Loops.

[BibT_eX]

[DOI]

Yi Li

Yong Feng

Proceedings of the 10th International Symposium on Theoretical Aspects of Software Engineering, 2016

2015

An Algorithm of City-Level Landmark Mining Based on Internet Forum.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on Network-Based Information Systems, 2015

2010

Stereo matching between images of large slope based on multi-scale directional wavelet transform.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Geoscience & Remote Sensing Symposium, 2010

The analysis of surface deformation based on two-pass and three-pass D-InSAR.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Geoscience & Remote Sensing Symposium, 2010

1997

Using Neural Network Predicted Secondary Structure Information in Automatic Protein NMR Assignment.

[BibT_eX]

[DOI]

Wing Yiu Choy

Bryan C. Sanctuary