Grzegorz Deptuch

Orcid: 0000-0003-1703-6758

According to our database1, Grzegorz Deptuch authored at least 15 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
Automated and Holistic Co-design of Neural Networks and ASICs for Enabling In-Pixel Intelligence.
CoRR, 2024

A Low-Power Data Link for Stitched Pixel Sensors.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2023
Self-Adaptation of Line Driver Pre-Emphasis Parameters via Embedded Line Loss Sensing.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

2022
A Low-Power 1 Gb/s Line Driver with Configurable Pre-Emphasis for Lossy Transmission Lines.
CoRR, 2022

Investigation of Timing Properties for an Event Driven with Access and Reset Decoder Readout Architecture for a Pixel Array.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Peak Prediction Using Multi Layer Perceptron (MLP) for Edge Computing ASICs Targeting Scientific Applications.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Design and Challenges of Edge Computing ASICs on Front-End Electronics.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2020
A 1.2-V 6-GHz Dual-Path Charge-Pump PLL Frequency Synthesizer for Quantum Control and Readout in CMOS 65-nm Process.
Proceedings of the 11th IEEE Annual Ubiquitous Computing, 2020

2018
An Algorithm of an X-ray Hit Allocation to a Single Pixel in a Cluster and Its Test-Circuit Implementation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Asynchronous Approximation of a Center of Gravity for Pixel Detectors' Readout Circuits.
IEEE J. Solid State Circuits, 2018

2017
A content addressable memory with multi-Vdd scheme for low power tunable operation.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2015
Pixellated readout IC: Analysis for single photon infrared detector for fast time of arrival applications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Ultra fast X-ray detection systems in nanometer and 3D technologies.
Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

2010
Pixel detectors in 3D technologies for high energy physics.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

3DIC multi-project fabrication run being organized by CMC/CMP/MOSIS and Tezzaron.
Proceedings of the IEEE International Conference on 3D System Integration, 2010


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