Grigorios Magklis

According to our database1, Grigorios Magklis authored at least 29 papers between 1999 and 2021.

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Bibliography

2021

2017
The ARM Scalable Vector Extension.
IEEE Micro, 2017

2014
Speculative hardware/software co-designed floating-point multiply-add fusion.
Proceedings of the Architectural Support for Programming Languages and Operating Systems, 2014

2011
CROB: Implementing a Large Instruction Window through Compression.
Trans. High Perform. Embed. Archit. Compil., 2011

Thread shuffling: combining DVFS and thread migration toreduce energy consumptions for multi-core systems.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

2010
Processor Microarchitecture: An Implementation Perspective
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01729-2, 2010

Thread-management techniques to maximize efficiency in multicore and simultaneous multithreaded microprocessors.
ACM Trans. Archit. Code Optim., 2010

Energy efficiency via thread fusion and value reuse.
IET Comput. Digit. Tech., 2010

A Dynamically Adaptable Hardware Transactional Memory.
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

2009
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery.
Proceedings of the PACT 2009, 2009

2008
Version management alternatives for hardware transactional memory.
Proceedings of the 9th workshop on MEmory performance, 2008

Thread fusion.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

Meeting points: using thread criticality to adapt multicore hardware to parallel regions.
Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008

2007
Understanding the Thermal Implications of Multi-Core Architectures.
IEEE Trans. Parallel Distributed Syst., 2007

Building a large instruction window through ROB compression.
Proceedings of the 2007 workshop on MEmory performance, 2007

2006
Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

2005
Distributing the Frontend for Temperature Reduction.
Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

2004
Dynamically Trading Frequency for Complexity in a GALS Microprocessor.
Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

Frontend Frequency-Voltage Adaptation for Optimal Energy-Delay^2.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

Hiding Synchronization Delays in a GALS Processor Microarchitecture.
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

The Energy Impact of Aggressive Loop Fusion.
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September, 2004

2003
Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor.
IEEE Micro, 2003

Dynamically Tuning Processor Resources with Adaptive Processing.
Computer, 2003

Profile-Based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor.
Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

2002
Dynamic frequency and voltage control for a multiple clock domain microarchitecture.
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling.
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002

Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power.
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 2002

1999
On Using Reliable Network RAM in Networks of Workstations.
Parallel Distributed Comput. Pract., 1999

On using network RAM as a non-volatile buffer.
Clust. Comput., 1999


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