Grigor Tshagharyan

According to our database, Grigor Tshagharyan authored at least 21 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Testing for Electromigration in Sub-5-nm FinFET Memories.

Mahta Mayahinia, Mehdi Baradaran Tahoori, Grigor Tshagharyan, Karen Amirkhanyan, Artur Ghukasyan, Gurgen Harutyunyan, Yervant Zorian

IEEE Des. Test, December, 2024

Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management.

Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian

Proceedings of the 42nd IEEE VLSI Test Symposium, 2024

Testing for aging in advanced SRAM: From front end of the line transistors to back end of the line interconnects.

Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian

Proceedings of the IEEE International Test Conference, 2024

2023

An Efficient External Memory Test Solution: Case Study for HPC Application.

Keqing Ouyang, Minqiang Peng, Yunnong Zhu, Kang Qi, Grigor Tshagharyan, Arun Kumar, Gurgen Harutyunyan, Isaac Wang

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Overcoming Embedded Memory Test & Repair Challenges in the Gate-All-Around Era.

Artur Ghukasyan, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

SLM Subsystem for Automotive SoC: Case Study on Path Margin Monitor.

Kranthi Kandula, Ramalingam Kolisetti, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian

Proceedings of the IEEE International Test Conference, 2023

Utilizing ECC Analytics to Improve Memory Lifecycle Management.

Costas Argyrides, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian

Proceedings of the IEEE International Test Conference, 2023

On-chip Electromigration Sensor for Silicon Lifecycle Management of Nanoscale VLSI.

Mahta Mayahinia, Mehdi Baradaran Tahoori, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian

Proceedings of the IEEE European Test Symposium, 2023

2022

Innovative Practices Track: What's Next for Automotive: Where and How to Improve Field Test and Enhance SoC Safety.

Minqiang Peng, Youfa Wu, Jialiang Li, Alex Yu, Grigor Tshagharyan, Costas Argyrides, Vilas Sridharan, Gurgen Harutyunyan, Yervant Zorian, Nilanjan Mukherjee

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

An Efficient Test Strategy for Detection of Electromigration Impact in Advanced FinFET Memories.

Mahta Mayahinia, Mehdi B. Tahoori, Gurgen Harutyunyan, Grigor Tshagharyan, Karen Amirkhanyan

Proceedings of the IEEE International Test Conference, 2022

2019

Innovative Practices on In-System Test and Reliability of Memories.

S. Bandyopadhyay, J. Mekkoth, Marc Hutner, Hayk T. Grigoryan, Arun Kumar, Samvel K. Shoukourian, Grigor Tshagharyan, Yervant Zorian, Gabriele Boschi, Duccio Lazzarotti, Donato Luongo, Hanna Shaheen, Gurgen Harutyunyan

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Variation-aware Fault Modeling and Test Generation for STT-MRAM.

Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Hayk T. Grigoryan, Grigor Tshagharyan

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

2018

Modeling and Testing of Aging Faults in FinFET Memories for Automotive Applications.

Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian, Anteneh Gebregiorgis, Mohammad Saber Golanbari, Rajendra Bishnoi, Mehdi Baradaran Tahoori

Proceedings of the IEEE International Test Conference, 2018

Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM.

Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Grigor Tshagharyan, Hayk T. Grigoryan, Gurgen Harutyunyan, Yervant Zorian

Proceedings of the IEEE International Test Conference, 2018

Implementation of Memory Static, Coupling and Dynamic Fault Models at the Register Transfer Level.

Davit Hayrapetyan, Aleksandr Manukvan, Grigor Tshagharyan

Proceedings of the 2018 IEEE East-West Design & Test Symposium, 2018

2017

An effective functional safety solution for automotive systems-on-chip.

Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian

Proceedings of the IEEE International Test Conference, 2017

Experimental study on Hamming and Hsiao codes in the context of embedded applications.

Grigor Tshagharyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian

Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

2016

Securing test infrastructure of system-on-chips.

Grigor Tshagharyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2015

Impact of parameter variations on FinFET faults.

Gurgen Harutyunyan, Grigor Tshagharyan, Yervant Zorian

Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Overview study on fault modeling and test methodology development for FinFET-based memories.

Grigor Tshagharyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian

Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015

2014

Fault modeling and test algorithm creation strategy for FinFET-based memories.

Gurgen Harutyunyan, Grigor Tshagharyan, Valery A. Vardanian, Yervant Zorian

Proceedings of the 32nd IEEE VLSI Test Symposium, 2014