Greg Dermer

According to our database, Greg Dermer authored at least 8 papers between 1987 and 2005.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2005

A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package.

Peter Hazucha, Gerhard Schrom, Jaehong Hahn, Bradley A. Bloechel, Paul Hack, Gregory E. Dermer, Siva G. Narendra, Donald S. Gardner, Tanay Karnik, Vivek De, Shekhar Borkar

IEEE J. Solid State Circuits, 2005

A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applications.

Dinesh Somasekhar, Shih-Lien Lu, Bradley A. Bloechel, Greg Dermer, Konrad Lai, Sjeljar Borkar, Vivek De

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

Measurements and analysis of SER-tolerant latch in a 90-nm dual-V_T CMOS process.

Peter Hazucha, Tanay Karnik, Steven Walstra, Bradley A. Bloechel, James W. Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Gregory E. Dermer, Siva G. Narendra, Vivek De, Shekhar Borkar

IEEE J. Solid State Circuits, 2004

2003

A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS.

Yatin Vasant Hoskote, Bradley A. Bloechel, Gregory E. Dermer, Vasantha Erraguntla, David Finan, Jason Howard, Dan Klowden, Siva G. Narendra, Greg Ruhl, James W. Tschanz, Sriram R. Vangal, Venkat Veeramachaneni, Howard Wilson, Jianping Xu, Nitin Borkar

IEEE J. Solid State Circuits, 2003

Measurements and analysis of SER tolerant latch in a 90 nm dual-Vt CMOS process.

Peter Hazucha, Tanay Kamik, Steven Walstra, Bradley A. Bloechel, James W. Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Greg Dermer, Siva G. Narendra, Vivek De, Shekhar Borkar

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

5-GHz 32-bit integer execution core in 130-nm dual-V_T CMOS.

Sriram R. Vangal, Mark A. Anders, Nitin Borkar, Erik Seligman, Venkatesh Govindarajulu, Vasantha Erraguntla, Howard Wilson, Amaresh Pangal, Venkat Veeramachaneni, James W. Tschanz, Yibin Ye, Dinesh Somasekhar, Bradley A. Bloechel, Gregory E. Dermer, Ram K. Krishnamurthy, Krishnamurthy Soumyanath, Sanu Mathew, Siva G. Narendra, Mircea R. Stan, Scott Thompson, Vivek De, Shekhar Borkar

IEEE J. Solid State Circuits, 2002

1988

The Astronautics ZS-1 processor.

James E. Smith, Gregory E. Dermer, B. D. Vanderwarn, S. D. Klinger, C. M. Rozewski, D. L. Fowler, K. R. Scidmore, James Laudon

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1987

The ZS-1 Central Processor.

James E. Smith, Gregory E. Dermer, B. D. Vanderwarn, S. D. Klinger, C. M. Rozewski, D. L. Fowler, K. R. Scidmore, James Laudon

Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS II), 1987