Graham R. Hellestrand

According to our database1, Graham R. Hellestrand authored at least 20 papers between 1991 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2004, "For contributions to computer system architecture simulations.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Engineering safe autonomous mobile systems of systems using specification (model) based systems architecture & engineering.
Proceedings of the IEEE International Systems Conference, 2013

2010
Hardware/Software Codesign of Aerospace and Automotive Systems.
Proc. IEEE, 2010

2008
Statistical characterization of execution time through simulation.
Proceedings of the International Workshop on Intelligent Solutions in Embedded Systems, 2008

Using Empirical Science to Engineer Systems: Optimizing Cache for Power and Performance.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2005
The Engineering of Supersystems.
Computer, 2005

Systems architecture: the empirical way: abstract architectures to 'optimal' systems.
Proceedings of the EMSOFT 2005, 2005

1999
Designing system on a chip products using systems engineering tools.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1997
A Visual Approach for Asynchronous Circuit Synthesis.
Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

A transformational codesign methodology.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1996
Elimination of Dynamic Hazards from Signal Transition Graphs.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

A Multi-Level Transformation Approach to HW/SW Codesign: A Case Study.
Proceedings of the Forth International Workshop on Hardware/Software Codesign, 1996

1995
A hardware architecture for video rate smooth shading of volume data.
Comput. Graph., 1995

A New Neural Network Approach to the Floorplanning of Hierarchical VLSI Designs.
Proceedings of the From Natural to Artificial Neural Computation, 1995

A Stepwise Refinement Algorithm for Integrated Floorplanning, Placement and Routing of Hierarchical Designs.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A Hardware Architecture for Video Rate Shading of Volume Data.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Placement with self-organising neural networks.
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995

A neural network approach to the placement problem.
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994
Signal Transition Graph Constraints for Synthesis of Hazard-Free Asynchronous Circuits with Unbounded-Gate Delays.
Formal Methods Syst. Des., 1994

A Real-Time Edge Detection ASIC Design.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1991
A highly parallel architecture for real time collision detection in flight simulation.
Comput. Graph., 1991


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