Graham Gobieski

Orcid: 0009-0005-5408-120X

According to our database1, Graham Gobieski authored at least 7 papers between 2016 and 2024.

Collaborative distances:

Timeline

2016
2017
2018
2019
2020
2021
2022
2023
2024
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Links

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Bibliography

2024
Monza: An Energy-Minimal, General-Purpose Dataflow System-on-Chip for the Internet of Things.
IEEE Micro, 2024

2023
MANIC: A $19\mu\mathrm{W}$ @ 4MHz, 256 MOPS/mW, RISC-V microcontroller with embedded MRAM main memory and vector-dataflow co-processor in 22nm bulk finFET CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A programmable, energy-minimal dataflow compiler and architecture.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

2021
Snafu: An Ultra-Low-Power, Energy-Minimal CGRA-Generation Framework and Architecture.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2019
MANIC: A Vector-Dataflow Architecture for Ultra-Low-Power Embedded Systems.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Intelligence Beyond the Edge: Inference on Intermittent Embedded Systems.
Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2016
Shuffler: Fast and Deployable Continuous Code Re-Randomization.
Proceedings of the 12th USENIX Symposium on Operating Systems Design and Implementation, 2016


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