Graham A. Jullien

J. Signal Process. Syst., 2012

2011

Error Recovery in Continuous Valued Number System.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2011

2010

High-speed and low-power reconfigurable architectures of 2-digit two-dimensional logarithmic number system-based recursive multipliers.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2010

Video-Active RAM: A processor-in-memory architecture for video coding applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Recursive architectures for 2DLNS multiplication.

[BibT_eX]

[DOI]

Mahzad Azarmehr

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Current-Mirror-Based Potentiostats for Three-Electrode Amperometric Electrochemical Sensors.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A Wireless-Implantable Microsystem for Continuous Blood Glucose Monitoring.

[BibT_eX]

[DOI]

IEEE Trans. Biomed. Circuits Syst., 2009

An Enhanced Lenient Merging Scheme for H.264 Variable Block Size Selection.

[BibT_eX]

[DOI]

Proceedings of the First International Conference on Advances in Multimedia, 2009

Low-complexity algorithm for fractional-pixel motion estimation.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Image Processing, 2009

Comparisons and Analysis of Motion Estimation Search Algorithms.

[BibT_eX]

[DOI]

Proceedings of the CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31, 2009

On using FPGAS to accelerate the emulation of quantum computing.

[BibT_eX]

[DOI]

Tamer Mohamed

Proceedings of the 22nd Canadian Conference on Electrical and Computer Engineering, 2009

2008

Low-Power Mixed-Signal CVNS-Based 64-Bit Adder for Media Signal Processing.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2008

Towards an H.264/AVC HW/SW Integrated Solution: An Efficient VBSME Architecture.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2008

A Low-Light CMOS Contact Imager With an Emission Filter for Biosensing Applications.

[BibT_eX]

[DOI]

IEEE Trans. Biomed. Circuits Syst., 2008

Robust analog neural network based on continuous valued number system.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A Low noise CMOS image sensor with an emission filter for fluorescence applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

On the refinement of the DCT/IDCT scaling factor sensitivity.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008

Hardware implementation of a DCT watermark for CMOS image sensors.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

A simplified approach for designing secure Random Number Generators in HW.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

A Tool for Robustness Evaluation of Image Watermarking Algorithms.

[BibT_eX]

[DOI]

Proceedings of the Advanced Techniques in Computing Sciences and Software Engineering, 2008

Comparisons and Analysis of DCT-based Image Watermarking Algorithms.

[BibT_eX]

[DOI]

Proceedings of the Advanced Techniques in Computing Sciences and Software Engineering, 2008

2007

On the Error-Free Realization of a Scaled DCT Algorithm and Its VLSI Implementation.

[BibT_eX]

[DOI]

Khan A. Wahid

Nicolas Veyrat-Charvillon

IEEE Trans. Circuits Syst. II Express Briefs, 2007

Multi-mode operator for SHA-2 hash functions.

[BibT_eX]

[DOI]

J. Syst. Archit., 2007

Simulation of random cell displacements in QCA.

[BibT_eX]

[DOI]

Gabriel Schulhof

Konrad Walus

ACM J. Emerg. Technol. Comput. Syst., 2007

A Simplified 8 × 8 Transformation and Quantization Real-Time IP-Block for MPEG-4 H.264/AVC Applications: a New Design Flow Approach.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2007

Crossbar latch-based combinational and sequential logic for nano FPGA.

[BibT_eX]

[DOI]

Tamer Mohamed

Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures, 2007

A CMOS Contact Imager for Cell Detection in Bio-Sensing Applications.

[BibT_eX]

[DOI]

Terence Tam

Orly Yadid-Pecht

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Digital Multiplication using Continuous Valued Digits.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Design Tools for an Emerging SoC Technology: Quantum-Dot Cellular Automata.

[BibT_eX]

[DOI]

Konrad Walus

Proc. IEEE, 2006

On the Use of Hash Functions as Preprocessing Algorithms to Detect Defects on Repeating Definite Textures.

[BibT_eX]

[DOI]

Mach. Vis. Appl., 2006

A proposed hardware reference model for spatial transformation and quantization in H.264.

[BibT_eX]

[DOI]

J. Vis. Commun. Image Represent., 2006

On the Reduction of Interconnect Effects in Deep Submicron Implementations of Digital Multiplication Architectures.

[BibT_eX]

[DOI]

Pedram Mokrian

J. Circuits Syst. Comput., 2006

Passive reduced-order macromodeling algorithm for structure dynamics in MEMS systems.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

SoC - what are our technology futures?

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on MEMS, NANO and Smart Systems, 2006

Implementation of a Simulation Engine for Clocked Molecular QCA.

[BibT_eX]

[DOI]

Konrad Walus

Gabriel Schulhof

Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

Array Processing Using Alternate Arithmetic - A 20 Year Legacy.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

New Encoding of 8×8 DCT to make H.264 Lossless.

[BibT_eX]

[DOI]

Khan Wahid

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

An Efficient Architecture for a Lifted 2D Biorthogonal DWT.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2005

A New Time Distributed DCT Architecture for MPEG-4 Hardware Reference Model.

[BibT_eX]

[DOI]

Mehboob Alam

IEEE Trans. Circuits Syst. Video Technol., 2005

Efficient Techniques for Binary-to-Multidigit Multidimensional Logarithmic Number System Conversion Using Range-Addressable Look-Up Tables.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2005

A Low-Power Two-Digit Multi-dimensional Logarithmic Number System Filterbank Architecture for a Digital Hearing Aid.

[BibT_eX]

[DOI]

EURASIP J. Adv. Signal Process., 2005

A Very Low Power CMOS Potentiostat for Bioimplantable Applications.

[BibT_eX]

[DOI]

Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

Performance comparison of quantum-dot cellular automata adders.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

CMOS image sensor with watermarking capabilities.

[BibT_eX]

[DOI]

Graham R. Nelson

Orly Yadid-Pecht

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A wide dynamic range CMOS active pixel sensor with frame difference.

[BibT_eX]

[DOI]

Vadim Alexander Milirud

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

DBNS addition using cellular neural networks.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A new CMOS charge pump for low voltage applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Microneedle Arrays for Drug Delivery and Fluid Extraction.

[BibT_eX]

[DOI]

P. Zhang

Proceedings of the 2005 International Conference on MEMS, 2005

A high-performance hardware implementation of the H.264 simplified 8×8 transformation and quantization [video coding].

[BibT_eX]

[DOI]

Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

All CMOS low power platform for dielectrophoresis bio-analysis.

[BibT_eX]

[DOI]

Proceedings of the 31st European Solid-State Circuits Conference, 2005

Simple 4-Bit Processor Based On Quantum-Dot Cellular Automata (QCA).

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

A Fault-Tolerant Modulus Replication Complex FIR Filter.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

Error-Free Computation of 8x8 2-D DCT and IDCT Using Two-Dimensional Algebraic Integer Quantization.

[BibT_eX]

[DOI]

Khan Wahid

Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005

2004

Self-synchronization of time delay and integration cameras.

[BibT_eX]

[DOI]

J. Electronic Imaging, 2004

Vlsi Architectures of Daubechies Wavelet Transforms Using Algebraic Integers.

[BibT_eX]

[DOI]

Khan Wahid

J. Circuits Syst. Comput., 2004

Parallel Montgomery Multiplication in GF(2k) using Trinomial Residue Arithmetic.

[BibT_eX]

[DOI]

Jean-Claude Bajard

Laurent Imbert

IACR Cryptol. ePrint Arch., 2004

A Programmable Base MDLNS MAC with Self-Generated Look-Up Table.

[BibT_eX]

[DOI]

Wenjing Zhang

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

Ultra Low Noise Signed Digit Arithmetic using Cellular Neural Networks.

[BibT_eX]

[DOI]

Y. Ibrahim

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

A programmable base 2D-LNS MAC with self-generated look-up tables.

[BibT_eX]

Wenjing Zhang

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A low-power DCT IP core based on 2D algebraic integer encoding.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

In-camera detection of fabric defects.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A VLSI prototype for Hadamard transform with application to MPEG-4 part 10.

[BibT_eX]

[DOI]

Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

Hardware prototyping for the H.264 4×4 transformation [video coding].

[BibT_eX]

[DOI]

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2003

A SoC Bio-analysis Platform for Real-time Biological Cell Analysis-on-a-Chip.

[BibT_eX]

[DOI]

J. R. Keilman

Karan V. I. S. Kaler

Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

The Application of 2D Algebraic Integer Encoding to a DCT IP Core.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

Efficient Distributed Arithmetic Based DWT Architecture for Multimedia Applications.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

A high speed complex adaptive filter for an asymmetric wireless LAN using a new quantized polynomial representation.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Micromachined Needles for Microbiological Sample and Drug Delivery System.

[BibT_eX]

[DOI]

Peiyu Zhang

Proceedings of the 2003 International Conference on MEMS, 2003

A 2-D LNS FIR Filter with a Programmable Second Base Using DRAMs.

[BibT_eX]

Proceedings of the First Workshop on Embedded Systems for Real-Time Multimedia, 2003

Error-Free Arithmetic for Discrete Wavelet Transforms Using Algebraic Integers.

[BibT_eX]

[DOI]

Khan A. Wahid

Proceedings of the 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 2003

2002

Guest Editorial.

[BibT_eX]

[DOI]

Michael J. Schulte

J. VLSI Signal Process., 2002

A New Algorithm for the Elimination of Common Subexpressions in Hardware Implementation of Digital Filters by Using Genetic Programming.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2002

A Number System with Continuous Valued Digits and Modulo Arithmetic.

[BibT_eX]

[DOI]

Aryan Saed

IEEE Trans. Computers, 2002

A New Methodology for Efficient Synchronization of RNS-Based VLSI Systems.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

A MEMS socket system for high density SoC interconnection.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

On the use of hash functions for defect detection in textures for in-camera web inspection systems.

[BibT_eX]

[DOI]

Roberto Muscedere

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A B-s complement continuous valued digit adder.

[BibT_eX]

[DOI]

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

An analysis of Daubechies discrete wavelet transform based on algebraic integer encoding scheme.

[BibT_eX]

[DOI]

Proceedings of the Third International Workshop on Digital and Computational Video, 2002

Efficient Conversion From Binary to Multi-Digit Multi-Dimensional Logarithmic Number Systems Using Arrays of Range Addressable Look-Up Tables.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

A Novel Pipelined Threads Architecture for AES Encryption Algorithm.

[BibT_eX]

[DOI]

Mehboob Alam

Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

2001

A novel approach based on genetic algorithm for pipelining of recursive filters.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

An efficient technique for error-free algebraic-integer encoding for high performance implementation of the DCT and IDCT.

[BibT_eX]

[DOI]

Minyi Fu

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A MEMS implementation of an acoustical sensor array.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

The Use of the Multi-Dimensional Logarithmic Number System in DSP Applications.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001

2000

Complexity and Fast Algorithms for Multiexponentiations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2000

Defect detection in web inspection using fuzzy fusion of texture features.

[BibT_eX]

[DOI]

S. Hossain Hajimowlana

Roberto Muscedere

James W. Roberts

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A MEMS micromagnetic actuator for use in a bionic interface.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

Theory and Applications of the Double-Base Number System.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1999

An In-Camera Data Stream Processing System for Defect Detection in Web Inspection Tasks.

[BibT_eX]

[DOI]

S. Hossain Hajimowlana

Roberto Muscedere

James W. Roberts

Real Time Imaging, 1999

Design of 1-D FIR filters with genetic algorithms.

[BibT_eX]

[DOI]

Proceedings of the ISSPA '99. Proceedings of the Fifth International Symposium on Signal Processing and its Applications, 1999

Arithmetic Circuits for Analog Digits.

[BibT_eX]

[DOI]

Aryan Saed

Proceedings of the 29th IEEE International Symposium on Multiple-Valued Logic, 1999

An in-the-loop training method for VLSI neural networks.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Designing FIR filters with enhanced Fermat ALUs.

[BibT_eX]

[DOI]

M. Shahkarami

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Design of 1-D FIR filters with genetic algorithms.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A hybrid DBNS processor for DSP computation.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Sensitivity study and improvements on a nonlinear resistive-type neuron circuit.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Arithmetic with Signed Analog Digits.

[BibT_eX]

[DOI]

Aryan Saed

Proceedings of the 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 1999

1998

A residue number system implementation of real orthogonal transforms.

[BibT_eX]

[DOI]

IEEE Trans. Signal Process., 1998

Digital Arithmetic Using Analog Cellular Neural Networks.

[BibT_eX]

[DOI]

Saeid Sadeghi-Emamchaie

J. Circuits Syst. Comput., 1998

Neural Network Integrated Circuits with Single-Block Mixed Signal Arrays.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 1998

A Low-Variation Nonlinear Neuron Circuit.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 1998

An Algorithm for Modular Exponentiation.

[BibT_eX]

[DOI]

Inf. Process. Lett., 1998

A new DCT algorithm based on encoding algebraic integers.

[BibT_eX]

[DOI]

Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Digital Arithmetic Using Analog Arrays.

[BibT_eX]

[DOI]

Saeid Sadeghi-Emamchaie

Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

1997

Fast adders using enhanced multiple-output domino logic.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 1997

A Method for Synthesizing Area Efficient Multilevel PTL Circuits.

[BibT_eX]

[DOI]

Subir Bandyopadhyay

Arunita Jaekel

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

Algorithms for Multi-Exponentiation Based on Complex Arithmetic.

[BibT_eX]

[DOI]

Proceedings of the 13th Symposium on Computer Arithmetic (ARITH-13 '97), 1997

1996

An efficient tree architecture for modulo 2n+1 multiplication.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 1996

High throughput VLSI DSP using replicated finite rings.

[BibT_eX]

[DOI]

Wenzhe Luo

J. VLSI Signal Process., 1996

On computing Chebyshev optimal nonuniform interpolation.

[BibT_eX]

[DOI]

Signal Process., 1996

VLSI Neural System Architecture for Finite Ring Recursive Reduction.

[BibT_eX]

[DOI]

David Zhang

Int. J. Neural Syst., 1996

Multilevel Factorization Technique for Pass Transistor Logic.

[BibT_eX]

[DOI]

Arunita Jaekel

Subir Bandyopadhyay

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

A modular architecture for hybrid VLSI neural networks and its application in a smart photosensor.

[BibT_eX]

[DOI]

Proceedings of International Conference on Neural Networks (ICNN'96), 1996

Design and VLSI Implementation of a Unified Synapse-Neuron Architecture.

[BibT_eX]

[DOI]

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995

A New Design Technique for Column Compression Multipliers.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1995

VLSI implementation of high throughput DSP using finite ring arithmetic.

[BibT_eX]

[DOI]

Proceedings of the 1995 International Conference on Acoustics, 1995

An array processor for inner product computations using a Fermat number ALU.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995

1994

Dynamic computational blocks for bit-level systolic arrays.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, January, 1994

Guest editor's introduction.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 1994

A fast VLSI systolic array for large modulus residue addition.

[BibT_eX]

[DOI]

Subir Bandyopadhyay

Abhijit Sengupta

J. VLSI Signal Process., 1994

Comments on "On asymmetrical performance of discrete cosine transform".

[BibT_eX]

[DOI]

IEEE Trans. Signal Process., 1994

Large Dynamic Range Computations over Small Finite Rings.

[BibT_eX]

[DOI]

Daniel Reaume

IEEE Trans. Computers, 1994

Recursive algorithms for the forward and inverse discrete cosine transform with arbitrary length.

[BibT_eX]

[DOI]

IEEE Signal Process. Lett., 1994

The generalized discrete W transform and its application to interpolation.

[BibT_eX]

[DOI]

Signal Process., 1994

Current Input TSPC Latch for High Speed, Complex Switching Trees.

[BibT_eX]

[DOI]

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Area-Time Analysis of Carry Lookahead Adders Using Enhanced Multiple Output Domino Logic.

[BibT_eX]

[DOI]

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A regular recursive algorithm for the discrete sine transform.

[BibT_eX]

[DOI]

Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

1993

VLSI implementations of number theoretic techniques in signal processing.

[BibT_eX]

[DOI]

Integr., 1993

Area Efficient VLSI Design with Cells of Controllable Complexity.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Conference on VLSI Design, 1993

Pipelined analog multi-layer feedforward neural networks.

[BibT_eX]

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

New Concepts for the Design of Carry Lookahaead Adders.

[BibT_eX]

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Integer mapping architectures for the polynomial ring engine.

[BibT_eX]

[DOI]

Proceedings of the 11th Symposium on Computer Arithmetic, 29 June, 1993

13 VLSI implementations of number theoretic concepts with applications in signal processing.

[BibT_eX]

[DOI]

J. Reilly

Proceedings of the Signal Processing and its Applications., 1993

1992

On implementing the arithmetic Fourier transform.

[BibT_eX]

[DOI]

IEEE Trans. Signal Process., 1992

A Large-swing High-Drive CMOS Buffer amplifier for a Wide Load Range.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 1992

1991

Arithmetic for digital neural networks.

[BibT_eX]

[DOI]

David Zhang

Earl E. Swartzlander Jr.

Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991

Small moduli replications in the MRRNS.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE Symposium on Computer Arithmetic, 1991

1990

A low-overhead scheme for testing a bit-level finite ring systolic array.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 1990

On Modulus Replication for Residue Arithmetic Computations of Complex Inner Products.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1990

Array processing on finite polynomial rings.

[BibT_eX]

[DOI]

Proceedings of the Application Specific Array Processors, 1990

1989

An efficient bit-level systolic cell design for finite ring digital signal processing applications.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 1989

VLSI implementation of a digital image threshold selection architecture.

[BibT_eX]

[DOI]

P. K. Lim

Maher A. Sid-Ahmed

Integr., 1989

1988

High-speed signal processing using systolic arrays over finite rings.

[BibT_eX]

[DOI]

Majid Taheri

IEEE J. Sel. Areas Commun., 1988

1987

Systolic ROM arrays for implementing RNS FIR filters.

[BibT_eX]

[DOI]

Majid Taheri

Proceedings of the IEEE International Conference on Acoustics, 1987

VLSI Modular architectures for complex digital signal processing applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1987

Implementation of the generalized FIR filter structure using the residue arithmetic.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1987

A signal processing cell architecture.

[BibT_eX]

[DOI]

Mohsin M. Jamali

M. M. Hussain

Proceedings of the IEEE International Conference on Acoustics, 1987

1986

Complex digital signal processing using quadratic residue number systems.

[BibT_eX]

[DOI]

IEEE Trans. Acoust. Speech Signal Process., 1986

The implementation of the generalized Lagrange FIR filter structure defined over finite fields or rings.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1986

Computation of complex number theoretic transforms using quadratic residue number systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1986

A VLSI array for computing the DFT based on RNS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1986

VLSI Implementation of Complex Digitial Signal Processing Structures.

[BibT_eX]

Proceedings of the Intelligent Autonomous Systems, 1986

1985

Software techniques for programming a general purpose data flow signal processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1985

An efficient VLSI adder for DSP architectures based on RNS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1985

A VLSI implementation of an FFT/NTT computational unit.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1985

1984

A VLSI model for residue number system architectures.

[BibT_eX]

[DOI]

Integr., 1984

A real time general purpose signal processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1984

A systolic (VLSI) array using RNS for digital signal processing applications.

[BibT_eX]

[DOI]

Proceedings of the ACM 12th annual computer science conference on SIGCSE symposium, 1984

1983

Processor Architectures for Two-Dimensional Convolvers Using a Single Multiplexed Computational Element with Finite Field Arithmetic.

[BibT_eX]

[DOI]

Hari K. Nagpal

IEEE Trans. Computers, 1983

An area-time efficient NMOS adder.

[BibT_eX]

[DOI]

Integr., 1983

Models for VLSI implementation of residue number system arithmetic modules.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE Symposium on Computer Arithmetic, 1983

1982

Memory architecture of a video-rate image convolver.

[BibT_eX]

[DOI]

Hari K. Nagpal

Proceedings of the IEEE International Conference on Acoustics, 1982

Quantization error and limit cycles analysis in residue number system coded recursive filters.

[BibT_eX]

[DOI]

Anna Z. Baraniecki

Proceedings of the IEEE International Conference on Acoustics, 1982

1981

A two-dimensional finite field processor for image filtering.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1981

1980

Implementation of Multiplication, Modulo a Prime Number, with Applications to Number Theoretic Transforms.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1980

A hardware realization of an NTT convolver using ROM arrays.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1980

1979

Implementation of FFT Structures Using the Residue Number System.

[BibT_eX]

[DOI]

Ben-Dau Tseng

IEEE Trans. Computers, 1979

Hardware implementation of convolution using number theoretic transforms.

[BibT_eX]

[DOI]

A. Baraniecka

Proceedings of the IEEE International Conference on Acoustics, 1979

1978

Residue Number Scaling and Other Operations Using ROM Arrays.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1978

An error anaylsis of a FFT implementation using the residue number system.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 1978

Recursive digital filters in image processing.

[BibT_eX]

[DOI]

A. Chottera

Proceedings of the IEEE International Conference on Acoustics, 1978

Application of the residue number system to computer processing of digital signals.

[BibT_eX]

[DOI]