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Govind Singh Patel

According to our database1, Govind Singh Patel authored at least 7 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Design and Investigation Inexact Compressor Based on Low Power Multiplier.
[BibTeX]
[DOI]
Sheetal Nagar
,
Shanky Saxena
,
Govind Singh Patel
,
Seema Nayak
,
Abhishek Kumar
J. Circuits Syst. Comput., November, 2023

An Ultra-Low-Power C-Band FMCW Transmitter Using a Fast Settling Fractional-N DPLL and Ring-Based Pulse Injection Locking Oscillator.
[BibTeX]
[DOI]
Abdul Muqueem
,
Shanky Saxena
,
Govind Singh Patel
J. Circuits Syst. Comput., February, 2023

2022
Design of Power, Area and Delay Optimized Direct Digital Synthesizer Using Modified 32-Bit Square Root Carry Select Adder.
[BibTeX]
[DOI]
Raju Ganna
,
Shanky Saxena
,
Govind Singh Patel
J. Circuits Syst. Comput., 2022

2021
Study of End to End Image Processing System Including Image De-noising, Image Compression & Image Security.
[BibTeX]
[DOI]
Sandeep K. Shelke
,
Sanjeet Kumar Sinha
,
Govind Singh Patel
Wirel. Pers. Commun., 2021

2020
Design of Low Power Si<sub>0.7</sub>Ge<sub>0.3</sub> Pocket Junction-Less Tunnel FET Using Below 5 nm Technology.
[BibTeX]
[DOI]
Suman Lata Tripathi
,
Govind Singh Patel
Wirel. Pers. Commun., 2020

2014
Parametric Analysis of a Novel Architecture of Phase Locked Loop for Communication System.
[BibTeX]
[DOI]
Govind Singh Patel
,
Sanjay Sharma
Wirel. Pers. Commun., 2014

Parametric Analysis to Reduce Phase Noise of Frequency Synthesizers for Wireless Communication System.
[BibTeX]
[DOI]
Govind Singh Patel
,
Sanjay Sharma
Wirel. Pers. Commun., 2014


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