Görschwin Fey
Orcid: 0000-0001-6433-6265Affiliations:
- Hamburg University of Technology (TUHH), Institute of Embedded Systems, Germany
- University of Bremen, Institute of Computer Science, Germany
- German Aerospace Center (DLR), Bremen, Germany
According to our database1,
Görschwin Fey
authored at least 184 papers
between 2002 and 2025.
Collaborative distances:
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Online presence:
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on orcid.org
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on id.loc.gov
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on d-nb.info
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on tuhh.de
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on dl.acm.org
On csauthors.net:
Bibliography
2025
ACM Comput. Surv., January, 2025
2024
Switching Frequency as FPGA Monitor: Studying Degradation and Ageing Prognosis at Large Scale.
CoRR, 2024
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024
Proceedings of the 37th IEEE International System-on-Chip Conference, 2024
Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024
Proceedings of the 27th ACM International Conference on Hybrid Systems: Computation and Control, 2024
Proceedings of the 50th Euromicro Conference on Software Engineering and Advanced Applications, 2024
Usability of Symbolic Regression for Hybrid System Identification - System Classes and Parameters (Short Paper).
Proceedings of the 35th International Conference on Principles of Diagnosis and Resilient Systems, 2024
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024
2023
GLRP: Guided by Layer-wise Relevance Propagation - Selecting Crucial Neurons in Artificial Neural Networks.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023
Enhancing Data Acquisition and Fault Analysis for Large-Scale Facilities: A Case Study on the Laser-Based Synchronization System at the European X-Ray Free-Electron Laser.
Proceedings of the Lernen, 2023
Proceedings of the 53. Jahrestagung der Gesellschaft für Informatik, INFORMATIK 2023, Designing Future, 2023
Proceedings of the IEEE European Test Symposium, 2023
Towards the Automatic Generation of Models for Prediction, Monitoring, and Testing of Cyber-Physical Systems.
Proceedings of the 28th IEEE International Conference on Emerging Technologies and Factory Automation, 2023
Data-Based Condition Monitoring and Disturbance Classification in Actively Controlled Laser Oscillators.
Proceedings of the Information Modelling and Knowledge Bases XXXV, 2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023
DEL: Dynamic Symbolic Execution-based Lifter for Enhanced Low-Level Intermediate Representation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Predictive Maintenance for the Optical Synchronization System of the European XFEL: A Systematic Literature Survey.
Proceedings of the Datenbanksysteme für Business, 2023
2022
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022
Proceedings of the 18th International Conference on Synthesis, 2022
Proceedings of the 30th IEEE International Requirements Engineering Conference Workshops, 2022
Proceedings of the 11th International Conference on Modern Circuits and Systems Technologies, 2022
Decision Trees for Analyzing Influences on the Accuracy of Indoor Localization Systems.
Proceedings of the 12th IEEE International Conference on Indoor Positioning and Indoor Navigation, 2022
Proceedings of the 27th IEEE International Conference on Emerging Technologies and Factory Automation, 2022
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
Proceedings of the Short Paper Proceedings of the 4th Workshop on Artificial Intelligence and Formal Verification, 2022
2021
CoRR, 2021
Effect Analysis of Low-Level Hardware Faults on Neural Networks using Emulated Inference.
Proceedings of the 10th International Conference on Modern Circuits and Systems Technologies, 2021
Proceedings of the 16th International Conference on Computer Science & Education, 2021
Proceedings of the 26th IEEE European Test Symposium, 2021
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
Comparative Evaluation of Semi-Supervised Anomaly Detection Algorithms on High-Integrity Digital Systems.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
Proceedings of the IEEE 45th Annual Computers, Software, and Applications Conference, 2021
Fault Analysis of the Beam Acceleration Control System at the European XFEL using Data Mining.
Proceedings of the 30th IEEE Asian Test Symposium, 2021
2020
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
2019
Formal Methods Syst. Des., 2019
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Proceedings of the 22nd Workshop Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2019
Proceedings of the 22nd Workshop Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2019
Proceedings of the 2019 Forum for Specification and Design Languages, 2019
Proceedings of the 24th IEEE European Test Symposium, 2019
Local Monitoring of Embedded Applications and Devices using Artificial Neural Networks.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
2018
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018
Towards Self-Explaining Digital Systems: A Design Methodology for the Next Generation.
Proceedings of the 3rd IEEE International Verification and Security Workshop, 2018
Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018
2017
Int. J. Softw. Tools Technol. Transf., 2017
Microprocess. Microsystems, 2017
A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms.
J. Electron. Test., 2017
Counterexample-Guided EF Synthesis of Boolean Functions.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017
Towards Making Fault Injection on Abstract Models a More Accurate Tool for Predicting RT-Level Effects.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017
CEGAR-based EF synthesis of Boolean functions with an application to circuit rectification.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Microprocess. Microsystems, 2016
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016
Proceedings of the Internet der Dinge, 2016
Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables.
Proceedings of the 17th Latin-American Test Symposium, 2016
Proceedings of the 1st IEEE International Verification and Security Workshop, 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Proceedings of the 2016 Forum on Specification and Design Languages, 2016
Designing reliable cyber-physical systems overview associated to the special session at FDL'16.
Proceedings of the 2016 Forum on Specification and Design Languages, 2016
Proceedings of the 21th IEEE European Test Symposium, 2016
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016
2015
Microprocess. Microsystems, 2015
Proceedings of the Proceedings 12th International Workshop on Formal Engineering approaches to Software Components and Architectures, 2015
Proceedings of the Formal Modeling and Verification of Cyber-Physical Systems, 2015
In-circuit Error Detection with Software-based Error Correction - An Alternative to TMR.
Proceedings of the Formal Modeling and Verification of Cyber-Physical Systems, 2015
Execution Tracing of C Code for Formal Analysis (Extended Abstract).
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2015
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Parity-based Soft Error Detection with Software-based Retry vs. Triplication-based Soft Error Correction - An Analytical Comparison on a Flash-based FPGA Architecture.
Proceedings of the 45. Jahrestagung der Gesellschaft für Informatik, Informatik, Energie und Umwelt, INFORMATIK 2015, Cottbus, Germany, September 28, 2015
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015
Proceedings of the 24th IEEE Asian Test Symposium, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Proceedings of the 15th International Microprocessor Test and Verification Workshop, 2014
Equivalence Checking on System Level using Stepwise Induction.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014
A Logic for Cardinality Constraints (Extended Abstract).
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014
Proceedings of the 9th International Design and Test Symposium, 2014
Proceedings of the 2014 Forum on Specification and Design Languages, 2014
Proceedings of the 19th IEEE European Test Symposium, 2014
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014
2013
Microprocess. Microsystems, 2013
Enhanced Formal Verification Flow for Circuits Integrating Debugging and Coverage Analysis.
Electron. Commun. Eur. Assoc. Softw. Sci. Technol., 2013
Yet a Better Error Explanation Algorithm (Extended Abstract).
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
Debugging HDL designs based on functional equivalences with high-level specifications.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
FAuST: A Framework for Formal Verification, Automated Debugging, and Software Test Generation.
Proceedings of the Model Checking Software - 19th International Workshop, 2012
Proceedings of the Tenth ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2012
Proceedings of the Hardware and Software: Verification and Testing, 2012
Proceedings of the Formal Methods in Computer-Aided Design, 2012
Proceedings of the 17th IEEE European Test Symposium, 2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 21st IEEE Asian Test Symposium, 2012
2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the Mathematical and Engineering Methods in Computer Science, 2011
Towards Automatic Property Generation for the Formal Verification of Bus Bridges.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2011
Proceedings of the Fourth IEEE International Conference on Software Testing, 2011
Proceedings of the First International Workshop on Design and Implementation of Formal Tools and Systems, 2011
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011
Proceedings of the 48th Design Automation Conference, 2011
2010
Automatische formale Verifikation der Fehlertoleranz von Schaltkreisen (Automated Formal Verification of Fault Tolerance for Circuits).
it Inf. Technol., 2010
J. Electron. Test., 2010
Proceedings of the 11th International Workshop on Microprocessor Test and Verification, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Evaluating Debugging Algorithms from a Qualitative Perspective.
Proceedings of the 2010 Forum on specification & Design Languages, 2010
Proceedings of the First Workshop on DYnamic Aspects in DEpendability Models for Fault-Tolerant Systems, 2010
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
2009
Effiziente Erfüllbarkeitsalgorithmen für die Generierung von Testmustern (Efficient Satisfiability Solving Algorithms for Test Pattern Generation).
it Inf. Technol., 2009
IET Comput. Digit. Tech., 2009
Proceedings of the Twentienth IEEE/IFIP International Symposium on Rapid System Prototyping, 2009
Increasing the Accuracy of SAT-based Debugging.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2009
Proceedings of the ISMVL 2009, 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the Eighteentgh Asian Test Symposium, 2009
Springer, ISBN: 978-90-481-2359-9, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Microprocess. Microsystems, 2008
Debugging Design Errors by Using Unsatisfiable Cores.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Evolutionary Test Generation, 24.08. - 29.08.2008, 2008
Proceedings of the 17th IEEE Asian Test Symposium, 2008
Robustness and usability in modern design flows.
Springer, ISBN: 978-1-4020-6535-4, 2008
2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the VLSI-SoC: Advanced Topics on Systems on a Chip, 2007
Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007
Verbesserte SAT basierte Fehlerdiagnose durch Widerspruchanalyse.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007
Formal Verification on the Word Level using SAT-like Proof Techniques.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Proceedings of the Formal Methods for Hardware Verification, 2006
SAT-based Calculation of Source Code Coverage for BMC.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006
Proceedings of the 36th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2006), 2006
Increasing robustness and usability of circuit design tools by using formal techniques.
Proceedings of the Ausgezeichnete Informatikdissertationen 2006, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Increasing robustness and usability of circuit design tools by using formal techniques.
PhD thesis, 2006
2005
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
Proceedings of the 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), 2004
Proceedings of the Applications of Evolutionary Computing, 2004
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Proceedings of the 1st ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2003), 2003
Cost-efficient Formal Block Verification for ASIC Design.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2003
Proceedings of the 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 2003
Using Games for Benchmarking and Representing the Complete Solution Space using Symbolic Techniques.
Proceedings of the 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 2003
MuTaTe: an efficient design for testability technique for multiplexor based circuits.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003
2002
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002