Gordon Gammie

According to our database1, Gordon Gammie authored at least 17 papers between 1991 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022

2021

2020
2.5 A 7nm FinFET 2.5GHz/2.0GHz Dual-Gear Octa-Core CPU Subsystem with Power/Performance Enhancements for a Fully Integrated 5G Smartphone SoC.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2017
3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
23.3 A highly integrated smartphone SoC featuring a 2.5GHz octa-core CPU with advanced high-performance and low-power techniques.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
10.3 heterogeneous multi-processing quad-core CPU and dual-GPU design for optimal performance, power, and thermal tradeoffs in a 28nm mobile application processor.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012
The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage.
IEEE Trans. Very Large Scale Integr. Syst., 2012

A 28 nm 0.6 V Low Power DSP for Mobile Applications.
IEEE J. Solid State Circuits, 2012

2011
Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local Variations.
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

A 28nm 0.6V low-power DSP for mobile applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
SmartReflex Power and Performance Management Technologies for 90 nm, 65 nm, and 45 nm Mobile Application Processors.
Proc. IEEE, 2010

Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltage.
Proceedings of the Design, Automation and Test in Europe, 2010

2008
A 45nm 3.5G Baseband-and-Multimedia Application Processor using Adaptive Body-Bias and Ultra-Low-Power Techniques.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

1999
Expediting ramp-to-volume production.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1991
Scanning tunneling microscopy of quasi-one-dimensional charge-density wave materials
PhD thesis, 1991


  Loading...