Gopinath Mahale

According to our database, Gopinath Mahale authored at least 10 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Optimizations for Very Long and Sparse Vector Operations on a RISC-V VPU: A Work-in-Progress.

Gopinath Mahale, Tejas Limbasiya, Muhammad Asad Aleem, Luis A. Plana, Aleksandar Duricic, Alireza Monemi, Xabier Abancens, Teresa Cervero, John D. Davis

Proceedings of the High Performance Computing, 2023

2020

WinDConv: A Fused Datapath CNN Accelerator for Power-Efficient Edge Devices.

Gopinath Mahale, Pramod P. Udupa, Kiran Kolar Chandrasekharan, Sehwan Lee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

IKW: Inter-Kernel Weights for Power Efficient Edge Computing.

Pramod P. Udupa, Gopinath Mahale, Kiran Kolar Chandrasekharan, Sehwan Lee

IEEE Access, 2020

Accelerating Depthwise Convolution and Pooling Operations on z-First Storage CNN Architectures.

Pramod P. Udupa, Gopinath Mahale, Kiran Kolar Chandrasekharan, Sehwan Lee

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2018

OpenCL-Based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes.

Tobias Kenter, Gopinath Mahale, Samer Alhaddad, Yevgen Grynko, Christian Schmitt, Ayesha Afzal, Frank Hannig, Jens Förstner, Christian Plessl

Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2016

REFRESH: REDEFINE for Face Recognition Using SURE Homogeneous Cores.

Gopinath Mahale, Hamsika Mahale, S. K. Nandy, Ranjani Narayan

IEEE Trans. Parallel Distributed Syst., 2016

VOP: Architecture of a Processor for Vector Operations in On-Line Learning of Neural Networks.

Gopinath Mahale, Soumitra Kumar Nandy, Eshan Bhatia, S. K. Nandy, Ranjani Narayan

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

On the modeling of error functions as high dimensional landscapes for weight initialization in learning networks.

Julius, Gopinath Mahale, T. Sumana, C. S. Adityakrishna

Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

2015

Hardware Solution for Real-Time Face Recognition.

Gopinath Mahale, Hamsika Mahale, Arnav Goel, S. K. Nandy, S. Bhattacharya, Ranjani Narayan

Proceedings of the 28th International Conference on VLSI Design, 2015

2014

Hardware architecture of bi-cubic convolution interpolation for real-time image scaling.

Gopinath Mahale, Hamsika Mahale, Rajesh Babu Parimi, S. K. Nandy, S. Bhattacharya

Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014