Gopal Raut

According to our database, Gopal Raut authored at least 24 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Precision-Aware Neuron Engine for DNN Accelerators.

Sudheer Vishwakarma, Gopal Raut, Sonu Jaiswal, Santosh Kumar Vishvakarma, Dhruva Ghai

SN Comput. Sci., June, 2024

In-Memory Computing with 6T SRAM for Multi-operator Logic Design.

Narendra Singh Dhakad, Eshika Chittora, Gopal Raut, Vishal Sharma, Santosh Kumar Vishvakarma

Circuits Syst. Signal Process., January, 2024

HYDRA: Hybrid Data Multiplexing and Run-time Layer Configurable DNN Accelerator.

Sonu Kumar, Komal Gupta, Gopal Raut, Mukul Lokhande, Santosh Kumar Vishvakarma

CoRR, 2024

QuantMAC: Enhancing Hardware Performance in DNNs With Quantize Enabled Multiply-Accumulate Unit.

Neha Ashar, Gopal Raut, Vasundhara Trivedi, Santosh Kumar Vishvakarma, Akash Kumar

IEEE Access, 2024

A SIMD Dynamic Fixed Point Processing Engine for DNN Accelerators.

Gopal Raut, Pranose J. Edavoor, David Selvakumar, Ritambhara Thakur

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023

Hybrid ADDer: A Viable Solution for Efficient Design of MAC in DNNs.

Vasundhara Trivedi, Khushbu Lalwani, Gopal Raut, Avikshit Khomane, Neha Ashar, Santosh Kumar Vishvakarma

Circuits Syst. Signal Process., December, 2023

Designing a Performance-Centric MAC Unit with Pipelined Architecture for DNN Accelerators.

Gopal Raut, Jogesh Mukala, Vishal Sharma, Santosh Kumar Vishvakarma

Circuits Syst. Signal Process., October, 2023

An Empirical Approach to Enhance Performance for Scalable CORDIC-Based Deep Neural Networks.

Gopal Raut, Saurabh Karkun, Santosh Kumar Vishvakarma

ACM Trans. Reconfigurable Technol. Syst., September, 2023

An Empirical Evaluation of Enhanced Performance Softmax Function in Deep Learning.

Sumiran Mehra, Gopal Raut, Ribhu Das Purkayastha, Santosh Kumar Vishvakarma, Anton Biasizzo

IEEE Access, 2023

Design and Analysis of Posit Quire Processing Engine for Neural Network Applications.

Pranose J. Edavoor, Aneesh Raveendran, David Selvakumar, Vivian Desalphine, Shankar G. Dharani, Gopal Raut

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

A Configurable Activation Function for Variable Bit-Precision DNN Hardware Accelerators.

Sudheer Vishwakarma, Gopal Raut, Narendra Singh Dhakad, Santosh Kumar Vishvakarma, Dhruva Ghai

Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023

2022

An accurate and noninvasive skin cancer screening based on imaging technique.

Gunjan Rajput, Shashank Agrawal, Gopal Raut, Santosh Kumar Vishvakarma

Int. J. Imaging Syst. Technol., 2022

Data multiplexed and hardware reused architecture for deep neural network accelerator.

Gopal Raut, Anton Biasizzo, Narendra Singh Dhakad, Neha Gupta, Gregor Papa, Santosh Kumar Vishvakarma

Neurocomputing, 2022

BitMAC: Bit-Serial Computation-Based Efficient Multiply-Accumulate Unit for DNN Accelerator.

Harsh Chhajed, Gopal Raut, Narendra Singh Dhakad, Sudheer Vishwakarma, Santosh Kumar Vishvakarma

Circuits Syst. Signal Process., 2022

SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture.

Nikhil Rangarajan, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Shubham Rai, Gopal Raut, Heba Abunahla, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar, Johann Knechtel, Ozgur Sinanoglu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Loading Effect Free MOS-only Voltage Reference Ladder for ADC in RRAM-crossbar Array.

Varun Bhatnagar, Gopal Raut, Santosh Kumar Vishvakarma

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

Correction to "RECON: Resource-Efficient CORDIC-Based Neuron Architecture".

Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar

IEEE Open J. Circuits Syst., 2021

RECON: Resource-Efficient CORDIC-Based Neuron Architecture.

Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar

IEEE Open J. Circuits Syst., 2021

VLSI implementation of transcendental function hyperbolic tangent for deep neural network accelerators.

Gunjan Rajput, Gopal Raut, Mahesh Chandra, Santosh Kumar Vishvakarma

Microprocess. Microsystems, 2021

2020

A 2.4-GS/s Power-Efficient, High-Resolution Reconfigurable Dynamic Comparator for ADC Architecture.

Gopal Raut, Ambika Prasad Shah, Vishal Sharma, Gunjan Rajput, Santosh Kumar Vishvakarma

Circuits Syst. Signal Process., 2020

A CORDIC Based Configurable Activation Function for ANN Applications.

Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

2019

Efficient Low-Precision CORDIC Algorithm for Hardware Implementation of Artificial Neural Network.

Gopal Raut, Vishal Bhartiy, Gunjan Rajput, Sajid Khan, Ankur Beohar, Santosh Kumar Vishvakarma

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

An Ultra Low Power AES Architecture for IoT.

Sajid Khan, Neha Gupta, Gopal Raut, Gunjan Rajput, Jai Gopal Pandey, Santosh Kumar Vishvakarma

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

Compact Spiking Neural Network System with SiGe Based Cylindrical Tunneling Transistor for Low Power Applications.

Ankur Beohar, Gopal Raut, Gunjan Rajput, Abhinav Vishwakarma, Ambika Prasad Shah, Bhupendra Singh Reniwal, Santosh Kumar Vishvakarma

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019