Gnanasekaran Dhanabalan
Orcid: 0000-0003-3462-7920
According to our database1,
Gnanasekaran Dhanabalan
authored at least 3 papers
between 2015 and 2023.
Collaborative distances:
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Bibliography
2023
Software Design of VerilogHDL Code Generation for Ladder Diagram and Data Acquisition Using LABVIEW.
Wirel. Pers. Commun., 2023
2022
Scan Time Reduction of PLCs by Dedicated Parallel-Execution Multiple PID Controllers Using an FPGA.
Sensors, 2022
2015
Design of parallel conversion multichannel analog to digital converter for scan time reduction of programmable logic controller using FPGA.
Comput. Stand. Interfaces, 2015