Giuseppe Visalli
Orcid: 0000-0003-1415-6359
According to our database1,
Giuseppe Visalli
authored at least 15 papers
between 2004 and 2021.
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Bibliography
2021
Upgrading an analog recovery loop for optimized decoding jointly to an increased data rate.
Telecommun. Syst., 2021
2019
A Novel Coordinate Rotation Digital Computer Method for Energy and Latency Saving by Trigonometric Operations Spatial Locality Principle.
J. Low Power Electron., 2019
EURASIP J. Adv. Signal Process., 2019
2017
J. Low Power Electron., 2017
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017
2013
J. Low Power Electron., 2013
2012
J. Low Power Electron., 2012
2008
J. Low Power Electron., 2008
2007
Analysis and Implementation of a Novel Leading Zero Anticipation Algorithm for Floating-Point Arithmetic Units.
IEEE Trans. Circuits Syst. II Express Briefs, 2007
J. Low Power Electron., 2007
2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Design issues for bus switch systems in deep sub-micro metric CMOS technologies.
Proceedings of the Third IASTED International Conference on Circuits, 2005
statistical analysis, for reducing the energy dissipation in a bus-switch encoder.
Proceedings of the Third IASTED International Conference on Circuits, 2005
2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
An application-oriented analysis of power/precision trade-off in fixed and floating-point arithmetic units for VLSI processors.
Proceedings of the Second IASTED International Conference on Circuits, 2004