Giuseppe Tuveri

According to our database, Giuseppe Tuveri authored at least 18 papers between 2012 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs.

Paolo Meloni, Claudio Rubattu, Giuseppe Tuveri, Danilo Pani, Luigi Raffo, Francesca Palumbo

J. Syst. Archit., 2017

On-FPGA Real-Time Processing of Biological Signals From High-Density MEAs: a Design Space Exploration.

Giovanni Pietro Seu, Gian Nicola Angotzi, Giuseppe Tuveri, Luigi Raffo, Luca Berdondini, Alessandro Maccione, Paolo Meloni

Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

2016

On-the-fly adaptivity for process networks over shared-memory platforms.

Giuseppe Tuveri, Paolo Meloni, Francesca Palumbo, Giovanni Pietro Seu, Igor Loi, Francesco Conti, Luigi Raffo

Microprocess. Microsystems, 2016

MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation.

Paolo Meloni, Francesca Palumbo, Claudio Rubattu, Giuseppe Tuveri, Danilo Pani, Luigi Raffo

Microprocess. Microsystems, 2016

2015

Exploring custom heterogeneous MPSoCs for real-time neural signal decoding.

Paolo Meloni, Giuseppe Tuveri, Danilo Pani, Luigi Raffo, Francesca Palumbo

Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

2014

A Custom MPSoC Architecture With Integrated Power Management for Real-Time Neural Signal Decoding.

Nicola Carta, Paolo Meloni, Giuseppe Tuveri, Danilo Pani, Luigi Raffo

IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

Online process transformation for polyhedral process networks in shared-memory MPSoCs.

Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Igor Loi, Francesco Conti

Proceedings of the 3rd Mediterranean Conference on Embedded Computing, 2014

A Stream Buffer Mechanism for Pervasive Splitting Transformations on Polyhedral Process Networks.

Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Igor Loi, Francesco Conti

Proceedings of the 2nd International Workshop on Many-core Embedded Systems, 2014

2013

Integrated support for Adaptivity and Fault-tolerance in MPSoCs.

Giuseppe Tuveri

PhD thesis, 2013

ASAM: Automatic architecture synthesis and application mapping.

Lech Józwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri, Luigi Raffo, Giuseppe Notarangelo

Microprocess. Microsystems, 2013

A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project.

Onur Derin, Emanuele Cannella, Giuseppe Tuveri, Paolo Meloni, Todor P. Stefanov, Leandro Fiorin, Luigi Raffo, Mariagiovanna Sami

Microprocess. Microsystems, 2013

A Low Overhead Self-adaptation Technique for KPN Applications on NoC-based MPSoCs.

Onur Derin, Prasanth Kuncheerath Ramankutty, Paolo Meloni, Giuseppe Tuveri

Proceedings of the PECCS 2013, 2013

A runtime adaptive H.264 video-decoding MPSoC platform.

Giuseppe Tuveri, Simone Secchi, Paolo Meloni, Luigi Raffo, Emanuele Cannella

Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2012

Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper.

Paolo Meloni, Sebastiano Pomata, Giuseppe Tuveri, Simone Secchi, Luigi Raffo, Menno Lindwer

VLSI Design, 2012

Adaptivity Support for MPSoCs Based on Process Migration in Polyhedral Process Networks.

Emanuele Cannella, Onur Derin, Paolo Meloni, Giuseppe Tuveri, Todor P. Stefanov

VLSI Design, 2012

System Adaptivity and Fault-Tolerance in NoC-based MPSoCs: The MADNESS Project Approach.

Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Emanuele Cannella, Todor P. Stefanov, Onur Derin, Leandro Fiorin, Mariagiovanna Sami

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

ASAM: Automatic Architecture Synthesis and Application Mapping.

Lech Józwiak, Menno Lindwer, Rosilde Corvino, Paolo Meloni, Laura Micconi, Jan Madsen, Erkan Diken, Deepak Gangadharan, Roel Jordans, Sebastiano Pomata, Paul Pop, Giuseppe Tuveri, Luigi Raffo

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Exploiting binary translation for fast ASIP design space exploration on FPGAs.

Sebastiano Pomata, Paolo Meloni, Giuseppe Tuveri, Luigi Raffo, Menno Lindwer

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012