Giuseppe Desoli

Orcid: 0000-0002-3901-0770

According to our database1, Giuseppe Desoli authored at least 22 papers between 1996 and 2024.

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Bibliography

2024
Roadmap to Neuromorphic Computing with Emerging Technologies.
CoRR, 2024

Layer-wise Exploration of a Neural Processing Unit Compiler's Optimization Space.
Proceedings of the 2024 10th International Conference on Computer Technology Applications, 2024

2023
A 40-310TOPS/W SRAM-Based All-Digital Up to 4b In-Memory Computing Multi-Tiled NN Accelerator in FD-SOI 18nm for Deep-Learning Edge Applications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2020
Runtime Design Space Exploration and Mapping of DCNNs for the Ultra-Low-Power Orlando SoC.
ACM Trans. Archit. Code Optim., 2020

2018
Parallelized Convolutions for Embedded Ultra Low Power Deep Learning SoC.
Proceedings of the 4th IEEE International Forum on Research and Technology for Society and Industry, 2018

Design Space Exploration for Orlando Ultra Low-Power Convolutional Neural Network SoC.
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018

2017
14.1 A 2.9TOPS/W deep convolutional neural network SoC in FD-SOI 28nm for intelligent embedded systems.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Approximate operations in Convolutional Neural Networks with RNS data representation.
Proceedings of the 25th European Symposium on Artificial Neural Networks, 2017

2016
The Orlando Project: A 28 nm FD-SOI Low Memory Embedded Neural Network ASIC.
Proceedings of the Advanced Concepts for Intelligent Vision Systems, 2016

2012
Variability-tolerant workload allocation for MPSoC energy minimization under real-time constraints.
ACM Trans. Embed. Comput. Syst., 2012

Variability-Aware Task Allocation for Energy-Efficient Quality of Service Provisioning in Embedded Streaming Multimedia Applications.
IEEE Trans. Computers, 2012

2011
An efficient on-line task allocation algorithm for QoS and energy efficiency in multicore multimedia platforms.
Proceedings of the Design, Automation and Test in Europe, 2011

SYNAPTIC Project: Regularity Applied to Enhance Manufacturability and Yield at Several Abstraction Levels.
Proceedings of the ARCS 2011, 2011

2010
Variability-tolerant run-time workload allocation for MPSoC energy minimization under real-time constraints.
Proceedings of the 7th Conference on Computing Frontiers, 2010

2009
Adaptive idleness distribution for non-uniform aging tolerance in MultiProcessor Systems-on-Chip.
Proceedings of the Design, Automation and Test in Europe, 2009

2007
Computing and design for software and silicon manufacturing.
Proceedings of the IFIP VLSI-SoC 2007, 2007

2006
Current and future trends in embedded VLIW microprocessors applied to multimedia and signal processing.
Proceedings of the 14th European Signal Processing Conference, 2006

2002
DELI: a new run-time control point.
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

A New Facility for Dynamic Control of Program Execution: DELI.
Proceedings of the Embedded Software, Second International Conference, 2002

2000
Lx: a technology platform for customizable VLIW embedded processing.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

1998
The latest word in digital and media processing.
IEEE Signal Process. Mag., 1998

1996
Custom-fit Processors: Letting Applications Define Architectures.
Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, 1996


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