Giuseppe Alia

According to our database, Giuseppe Alia authored at least 19 papers between 1973 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

A high performance ROM-based structure for modular exponentiation.

Giuseppe Alia, Enrico Martinelli

Comput. Electr. Eng., 2011

2005

NEUROM: a ROM based RNS digital neuron.

Giuseppe Alia, Enrico Martinelli

Neural Networks, 2005

2002

Fast modular exponentiation of large numbers with large exponents.

Giuseppe Alia, Enrico Martinelli

J. Syst. Archit., 2002

1998

Sign detection in residue arithmetic units.

Giuseppe Alia, Enrico Martinelli

J. Syst. Archit., 1998

Logic Design of a Fast Circuit for Iterative Additions in Redundant Hybrid.

Giuseppe Alia, Enrico Martinelli

Comput. J., 1998

1993

On the Lower Bound to the VLSI Complexity of Number Conversion from Weighted to Residue Representation.

Giuseppe Alia, Enrico Martinelli

IEEE Trans. Computers, 1993

1991

A VLSI Modulo m Multiplier.

Giuseppe Alia, Enrico Martinelli

IEEE Trans. Computers, 1991

1990

A VLSI structure for<i>X</i>(mod<i>m</i>) operation.

Giuseppe Alia, Enrico Martinelli

J. VLSI Signal Process., 1990

VLSI Binary-Residue Converters for Pipelined Processing.

Giuseppe Alia, Enrico Martinelli

Comput. J., 1990

1986

Fast hardware graphic generators of curve families.

Giuseppe Alia, Enrico Martinelli, N. Tani

Comput. Graph., 1986

1985

Table Look-up Graphic Interpolation.

Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli, N. Tani

Proceedings of the 6th European Computer Graphics Conference and Exhibition, 1985

1984

A Fast VLSI Conversion Between Binary and Residue Systems.

Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli

Inf. Process. Lett., 1984

A fast near optimum VLSI implementation of FFT using residue number systems.

Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli

Integr., 1984

An Approach to the Design of Hardware Curve Generators for Graphic Displays.

Giuseppe Alia, Enrico Martinelli, N. Tani

Proceedings of the 5th European Computer Graphics Conference and Exhibition, 1984

1983

VLSI systolic arrays for band matrix multiplication.

Giuseppe Alia

Integr., 1983

1982

On switching network functionalities and their relationships.

Giuseppe Alia, Enrico Martinelli

Int. J. Parallel Program., 1982

1978

LSI components modelling in a three-valued functional simulation.

Giuseppe Alia, P. Ciompi, Enrico Martinelli, F. Bernardini

Proceedings of the 15th Design Automation Conference, 1978

1974

An approach to optimal partitioning of hypergraphs.

Giuseppe Alia, Piero Maestrini

Proceedings of the 1974 ACM Annual Conference, 1974

1973

Automated module placement and wire routeing according to a structured biplanar scheme in printed boards.

Giuseppe Alia, Graziano Frosini, Piero Maestrini

Comput. Aided Des., 1973