Giovanni Causapruno

According to our database1, Giovanni Causapruno authored at least 13 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
Exploiting the Logic-In-Memory paradigm for speeding-up data-intensive algorithms.
Integr., 2019

2018
Parallel and Serial Computation in Nanomagnet Logic: An Overview.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2016
Architectural Solutions for NanoMagnet Logic.
PhD thesis, 2016

Reconfigurable Systolic Array: From Architecture to Physical Design for NML.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A Reconfigurable Array Architecture for NML.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2015
Protein Alignment Systolic Array Throughput Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Interleaving in Systolic-Arrays: A Throughput Breakthrough.
IEEE Trans. Computers, 2015

Logic-in-Memory: A Nano Magnet Logic Implementation.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

Logic-in-Memory architecture made real.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
NanoMagnet Logic: An Architectural Level Overview.
Proceedings of the Field-Coupled Nanocomputing - Paradigms, Progress, and Perspectives, 2014

A standard cell approach for MagnetoElastic NML circuits.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014

High Speed VLSI Architecture for Finding the First W Maximum/Minimum Values.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2014

A Framework for Network-On-Chip Comparison Based on OpenSPARC T2 Processor.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2014


  Loading...