Giovanni Battista Gerace

According to our database, Giovanni Battista Gerace authored at least 11 papers between 1963 and 1976.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1976

Synchronous and Asynchronous Procedures for the Synthesis of Master-Slave Circuits.

Graziano Frosini, Giovanni B. Gerace

IEEE Trans. Computers, 1976

1971

TOPI - A Special-Purpose Computer for Boolean Analysis and Synthesis.

Giovanni Battista Gerace, Luigi Gilli, Piero Maestrini, Angelo Raffaele Meo

IEEE Trans. Computers, 1971

A Universal STT State Assignment Method for Pulse Input Asynchronous Sequential Circuits.

Graziano Frosini, Giovanni B. Gerace

IEEE Trans. Computers, 1971

Pulse Input Asynchronous Sequential Circuits.

Graziano Frosini, Giovanni B. Gerace

IEEE Trans. Computers, 1971

Synthesis of Asynchronous Sequential Circuits with Master-Slave Subcircuits

Graziano Frosini, Giovanni B. Gerace

Proceedings of the 12th Annual Symposium on Switching and Automata Theory, 1971

1969

Sequential Machines with Less Delay Elements than Feedback Paths.

Giovanni B. Gerace, Giuseppe Gestri

IEEE Trans. Computers, 1969

1968

Digital System Design Automation - A Method for Designing a Digital System as a Sequential Network System.

Giovanni B. Gerace

IEEE Trans. Computers, 1968

Decomposition of a Synchronous Machine into an Asynchronous Submachine driving a Synchronous One

Giovanni B. Gerace, G. Gestri

Inf. Control., 1968

1967

State Assignments for Reducing the Number of Delay Elements in Sequential Machines

Giovanni B. Gerace, G. Gestri

Inf. Control., March, 1967

Decomposition of Synchronous Sequential Machines into Synchronous and Asynchronous Submachines

Giovanni B. Gerace, G. Gestri

Inf. Control., 1967

1963

Microprogrammed Control for Computing Systems.

Giovanni Battista Gerace

IEEE Trans. Electron. Comput., 1963