Gioele Mirabelli

According to our database, Gioele Mirabelli authored at least 7 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Thermal Considerations for Block-Level PPA Assessment in Angstrom Era: A Comparison Study of Nanosheet FETs (A10) & Complementary FETs (A5).

S. Mishra, Bjorn Vermeersch, Sankatali Venkateswarlu, Halil Kukner, Gioele Mirabelli, Fabian M. Bufler, Moritz Brunion, Dawit Burusie Abdi, Herman Oprins, Dwaipayan Biswas, Odysseas Zografos, Francky Catthoor, Pieter Weckx, Geert Hellings, James Myers, Julien Ryckaert

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

PPA and Scaling Potential of Backside Power Options in N2 and A14 Nanosheet Technology.

S. Yang, Pieter Schuddinck, Marie Garcia Bardon, Yang Xiang, Anabela Veloso, B. T. Chan, Gioele Mirabelli, Gaspard Hiblot, Geert Hellings, Julien Ryckaert

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node.

Giuliano Sisto, R. Preston, Rongmei Chen, Gioele Mirabelli, Anita Farokhnejad, Yun Zhou, Ivan Ciofi, Anne Jourdain, A. Veloso, Michele Stucchi, Odysseas Zografos, Pieter Weckx, Geert Hellings, Julien Ryckaert

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

The Promise of 2-D Materials for Scaled Digital and Analog Applications.

Devin Verreck, Piet Wambacq, Maarten Van De Put, Zubair Ahmed, Quentin Smets, Aryan Afzalian, Rutger Duflou, Xiangyu Wu, Gioele Mirabelli, Rongmei Chen, Inge Asselberghs, Gouri Sankar Kar

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022

PPAC of sheet-based CFET configurations for 4 track design with 16nm metal pitch.

Pieter Schuddinck, Fabian M. Bufler, Yang Xiang, Anita Farokhnejad, Gioele Mirabelli, Anne Vandooren, Bilal Chehab, A. Gupta, César Roda Neve, Geert Hellings, Julien Ryckaert

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Design enablement of CFET devices for sub-2nm CMOS nodes.

Odysseas Zografos, Bilal Chehab, Pieter Schuddinck, Gioele Mirabelli, Naveen Kakarla, Yang Xiang, Pieter Weckx, Julien Ryckaert

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2017

Impact of impurities, interface traps and contacts on MoS2 MOSFETs: Modelling and experiments.

Gioele Mirabelli, Farzan Gity, Scott Monaghan, Paul K. Hurley, Ray Duffy

Proceedings of the 47th European Solid-State Device Research Conference, 2017