Gin Yee

According to our database, Gin Yee authored at least 10 papers between 1996 and 2002.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2002

Locally clocked pipelines and dynamic logic.

Gregg N. Hoyer, Gin Yee, Carl Sechen

IEEE Trans. Very Large Scale Integr. Syst., 2002

2000

Clock-delayed domino for dynamic circuit design.

Gin Yee, Carl Sechen

IEEE Trans. Very Large Scale Integr. Syst., 2000

A third-generation SPARC V9 64-b microprocessor.

Raymond A. Heald, Kathirgamar Aingaran, Chaim Amir, Michael Ang, Michael Boland, Pankaj Dixit, Gary Gouldsberry, Dale Greenley, Joel Grinberg, Jason M. Hart, Tim Horel, Wen-Jay Hsu, James M. Kaku, Chin Kim, Song Kim, Fabian Klass, Hang Kwan, Gary Lauterbach, Roger Lo, Hugh McIntyre, Anup Mehta, David Murata, Sophie Nguyen, Yet-Ping Pai, Subeer Patel, Ken Shin, Kenway Tam, Sai Vishwanthaiah, John Wu, Gin Yee, Eileen You

IEEE J. Solid State Circuits, 2000

An Automated Shielding Algorithm and Tool For Dynamic Circuits.

Gin Yee, Tyler Thorp, Ron Christopherson, Ban P. Wang, Carl Sechen

Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

Output Prediction Logic: A High-Performance CMOS Design Technique.

Larry McMurchie, Su Kio, Gin Yee, Tyler Thorp, Carl Sechen

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Delay Minimization and Technology Mapping of Two-Level Structures and Implementation Using Clock-Delayed Domino Logic.

Jovanka Ciric, Gin Yee, Carl Sechen

Proceedings of the 2000 Design, 2000

1999

A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors.

Fabian Klass, Chaim Amir, Ashutosh Das, Kathirgamar Aingaran, Cindy Truong, Richard Wang, Anup Mehta, Raymond A. Heald, Gin Yee

IEEE J. Solid State Circuits, 1999

Design and Synthesis of Monotonic Circuits.

Tyler Thorp, Gin Yee, Carl Sechen

Proceedings of the IEEE International Conference On Computer Design, 1999

1998

Domino logic synthesis using complex static gates.

Tyler Thorp, Gin Yee, Carl Sechen

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1996

Clock-Delayed Domino for Adder and Combinational Logic Desig.

Gin Yee, Carl Sechen

Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996