Gildas Léger
Orcid: 0000-0002-2310-7906
According to our database1,
Gildas Léger
authored at least 48 papers
between 2002 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
2005
2010
2015
2020
0
1
2
3
4
5
6
7
1
1
1
1
2
1
1
1
1
2
1
1
2
2
6
3
1
2
4
3
2
2
1
1
2
3
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2023
IEEE Trans. Very Large Scale Integr. Syst., December, 2023
Proceedings of the IEEE European Test Symposium, 2023
2022
A methodology for defect detection in analog circuits based on causal feature selection.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
2020
On the importance of bias-dependent charge injection for SET evaluation in AMS Circuits.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020
Non-Linear Calibration of Pipeline ADCs using a Histogram-Based Estimation of the Redundant INL.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020
2019
Proceedings of the 16th International Conference on Synthesis, 2019
Efficient generation of data sets for one-shot statistical calibration of RF/mm-wave circuits.
Proceedings of the 16th International Conference on Synthesis, 2019
Feature selection and feature design for machine learning indirect test: a tutorial review.
Proceedings of the 16th International Conference on Synthesis, 2019
Yield Recovery of mm-Wave Power Amplifiers using Variable Decoupling Cells and One-Shot Statistical Calibration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019
On the use of causal feature selection in the context of machine-learning indirect test.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018
2017
On the limits of machine learning-based test: A calibrated mixed-signal system case study.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Brownian distance correlation-directed search: A fast feature selection technique for alternate test.
Integr., 2016
Questioning the reliability of Monte Carlo simulation for machine learning test validation.
Proceedings of the 21th IEEE European Test Symposium, 2016
Linearity test of high-speed high-performance ADCs using a self-testable on-chip generator.
Proceedings of the 21th IEEE European Test Symposium, 2016
2015
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015
Proceedings of the 20th IEEE European Test Symposium, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Feature selection for alternate test using wrappers: application to an RF LNA case study.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Closed-loop simulation method for evaluation of static offset in discrete-time comparators.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
Sinusoidal signal generation for mixed-signal BIST using a harmonic-cancellation technique.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
Proceedings of the 18th IEEE European Test Symposium, 2013
2012
Proceedings of the 13th Latin American Test Workshop, 2012
Proceedings of the 17th IEEE European Test Symposium, 2012
2011
Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures.
J. Electron. Test., 2011
Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs.
Proceedings of the 20th IEEE Asian Test Symposium, 2011
2010
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
2006
Proceedings of the 11th European Test Symposium, 2006
2005
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST.
J. Electron. Test., 2005
2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications.
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
2002
Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation.
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
Low-cost on-chip measurements for Oscillation-Based-Test in Analog Integrated Circuits.
Proceedings of the 3rd Latin American Test Workshop, 2002
Practical solutions for the application of the oscillation-based-test in analog integrated circuits.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002