Gianluca Giustolisi

IEEE Access, 2022

A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers.

[BibT_eX]

[DOI]

IEEE Access, 2022

A Biasing Approach to Design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs.

[BibT_eX]

[DOI]

IEEE Access, 2022

Design Methodology of the Output Power Stage of a Step-Down DC-DC Converter.

[BibT_eX]

[DOI]

Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

2021

Design of Three-Stage OTA Based on Settling-Time Requirements Including Large and Small Signal Behavior.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Design of CMOS three-stage amplifiers for near-to-minimum settling-time.

[BibT_eX]

[DOI]

Microelectron. J., 2021

Design of Three-Stage OTAs from Settling-Time and Slew-Rate Constraints.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2019

In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Optimized Charge Pump With Clock Booster for Reduced Rise Time or Silicon Area.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies.

[BibT_eX]

[DOI]

Microelectron. J., 2019

2018

Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017.

[BibT_eX]

[DOI]

Giulia Di Capua

Nuno Horta

Francisco V. Fernández

Integr., 2018

Bessel-like compensation of three-stage operational transconductance amplifiers.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2018

Settling-time oriented OTA design through the approximation of the ideal delay.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Design of CMOS OTAs with Settling-Time Constraints.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

A Clock Boosted Charge Pump with Reduced Rise Time.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

Robust design of CMOS amplifiers oriented to settling-time specification.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2017

2016

Verilog-a modeling of Silicon Photo-Multipliers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes.

[BibT_eX]

[DOI]

Alfio Dario Grasso

IEEE Trans. Instrum. Meas., 2015

Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014

Monolithic quenching-and-reset circuit for single-photon avalanche diodes.

[BibT_eX]

[DOI]

Alfio Dario Grasso

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013

A simple extraction procedure for determining the electrical parameters in Silicon Photomultipliers.

[BibT_eX]

[DOI]

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2012

Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulators.

[BibT_eX]

[DOI]

Ester Spitale

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

An Accurate Ultra-Compact I-V Model for Nanometer MOS Transistors With Applications on Digital Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Behavioral modeling of statistical phenomena of single-photon avalanche diodes.

[BibT_eX]

[DOI]

Rosario Mita

Int. J. Circuit Theory Appl., 2012

Logic gates dynamic modeling by means of an ultra-compact MOS model.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Verilog-A modeling of SPAD statistical phenomena.

[BibT_eX]

[DOI]

Rosario Mita

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

An ultra-compact MOS model in nanometer technologies.

[BibT_eX]

[DOI]

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model.

[BibT_eX]

[DOI]

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2008

Low-voltage LDO Compensation Strategy based on Current Amplifiers.

[BibT_eX]

[DOI]

Ester Spitale

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Modeling of EMI propagation in switched-capacitor ΣΔ A/D converter.

[BibT_eX]

[DOI]

David Cristaldi

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier.

[BibT_eX]

[DOI]

Alfio Dario Grasso

IEEE Trans. Circuits Syst. II Express Briefs, 2007

Resistance of Feedback Amplifiers: A Novel Representation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2007

Two-Stage OTA Design Based on Settling-Time Constraints.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Rosenstark-like Representation of Feedback Amplifier Resistance.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

LDO compensation strategy based on current buffer/amplifiers.

[BibT_eX]

[DOI]

Ester Spitale

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006

Analysis of power supply gain of CMOS bandgap references.

[BibT_eX]

[DOI]

Christian Falconi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

NMOS Low Drop-Out Regulator with Dynamic Biasing.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

Design and Comparison of Very Low-Voltage CMOS Output Stages.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Comparison of methods for predicting distortion in class-AB stages.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on Electronics, 2005

Analysis and optimization of a low-voltage class-AB output stage.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on Electronics, 2005

Statistical analysis of CMOS current reference.

[BibT_eX]

[DOI]

Maurizio Gaibotti

Michelangelo Pisasale

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

Guidelines for designing class-AB output stages.

[BibT_eX]

[DOI]

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2004

Exploiting the high-frequency performance of low-voltage low-power SC filters.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2004

Sigma-Delta A/D fuzzy converter.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

A low-voltage low-power voltage reference based on subthreshold MOSFETs.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2003

Analysis, modelling and optimization of a gain boosted telescopic amplifier.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2003

CMOS implementation of an extended CNN cell to deal with complex dynamics.

[BibT_eX]

[DOI]

Alessandro Rizzo

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A new method for evaluating harmonic distortion in push-pull output stages.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A novel 1-V class-AB transconductor for improving speed performance in SC applications.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design of low-voltage low-power SC filters for high-frequency applications.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 1-V CMOS output stage with high linearity.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Current-mode A/D fuzzy converter.

[BibT_eX]

[DOI]

IEEE Trans. Fuzzy Syst., 2002

Analysis of power supply noise attenuation in a PTAT current source.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Analysis and optimization of gain-boosted telescopic amplifiers.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Statistical analysis of the resolution in a current-mode ADC.

[BibT_eX]

[DOI]

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001

Analysis and optimization of a novel CMOS multiplier.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2001

Detailed frequency analysis of power supply rejection in Brokaw bandgap.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A fuzzy controller for step-up DC/DC converters.

[BibT_eX]

[DOI]

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000

CMRR frequency response of CMOS operational transconductance amplifiers.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2000

1.2-V CMOS op-amp with a dynamically biased output stage.

[BibT_eX]

[DOI]

T. Segreto

IEEE J. Solid State Circuits, 2000

A fuzzy membership function circuit in SC technique.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

High-linear class AB transconductor for high-frequency applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1998

A 1.5 V CMOS voltage multiplier.

[BibT_eX]

[DOI]