Giancarlo Ragone

According to our database, Giancarlo Ragone authored at least 3 papers between 2001 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

A 4Gb 2b/cell NAND Flash Memory with Embedded 5b BCH ECC for 36MB/s System Read Throughput.

Rino Micheloni, R. Ravasio, Alessia Marelli, E. Alice, V. Altieri, A. Bovino, Luca Crippa, E. Di Martino, L. D'Onofrio, A. Gambardella, E. Grillea, G. Guerra, D. Kim, C. Missiroli, Ilaria Motta, A. Prisco, Giancarlo Ragone, M. Romano, Miriam Sangalli, P. Sauro, Marco Scotti, S. Won

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2003

High-voltage management in single-supply CHE NOR-type flash memories.

Ilaria Motta, Giancarlo Ragone, Osama Khouri, Guido Torelli, Rino Micheloni

Proc. IEEE, 2003

2001

Modular architecture for a family of multilevel 256/192/128/64 Mbit 2-bit/cell 3 V-only NOR flash memory devices.

Andrea Silvagni, Stefano Zanardi, Alessandro Manstretta, Marco Scotti, Luca Crippa, Giancarlo Ragone, Giuseppe Fusillo, Giovanni Campardo, Osama Khouri, Marcello Stefanelli

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001