Gian Singh

Orcid: 0000-0001-6649-8487

According to our database1, Gian Singh authored at least 11 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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2010
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2014
2016
2018
2020
2022
2024
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Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
An ASIC Accelerator for QNN With Variable Precision and Tunable Energy Efficiency.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2024

A High Throughput, Energy-Efficient Architecture for Variable Precision Computing in DRAM.
Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

Energy-Efficient and Low-Latency Computation of Transcendental Functions in a Precision-Tunable PIM Architecture.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Hardware-Software Co-Design for Path Planning by Drones.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2024

A DRAM-based Near-Memory Architecture for Accelerated and Energy-Efficient Execution of Transformers.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023
PARAG: PIM Architecture for Real-Time Acceleration of GCNs.
Proceedings of the 30th IEEE International Conference on High Performance Computing, 2023

2022
A Novel ASIC Design Flow Using Weight-Tunable Binary Neurons as Standard Cells.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Tunable Precision Control for Approximate Image Filtering in an In-Memory Architecture with Embedded Neurons.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2021
CIDAN: Computing in DRAM with Artificial Neurons.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2019
Threshold Logic in a Flash.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

2007
A bibliometric study of literature on digital libraries.
Electron. Libr., 2007


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