Gian Marco Bo

According to our database, Gian Marco Bo authored at least 12 papers between 1997 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2002

A Self-Learning Analog Neural Processor.

Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

2001

Analog CMOS implementation of feature detection operators for automatic real-time optical character recognition systems.

Daniele D. Caviglia, M. Tosato, M. Mazzucco, Gian Marco Bo, Maurizio Valle

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000

Analog CMOS current mode neural primitives.

Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Enrico Biglieri, Daniele D. Caviglia

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

An analog on-chip learning circuit architecture of the weight perturbation algorithm.

Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Ezio Biglieri, Daniele D. Caviglia

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A VLSI Architecture for Weight Perturbation on Chip Learning Implementation.

Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Daniele D. Caviglia

Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000

An On-Chip Learning Neural Network.

Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle

Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000

1999

Evaluation and Validation of Local and Adaptive Weight Perturbation Learning Algorithms for Optical Characters Recognition Applications.

Francesco Diotalevi, Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle

Proceedings of the Third ICSC Symposia on Intelligent Industrial Automation (IIA'99) and Soft Computing (SOCO'99), 1999

1998

Analog VLSI circuits as physical structures for perception in early visual tasks.

Luigi Raffo, Silvio P. Sabatini, Gian Marco Bo, Giacomo M. Bisio

IEEE Trans. Neural Networks, 1998

An analog VLSI implementation of a feature extractor for real time optical character recognition.

Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle

IEEE J. Solid State Circuits, 1998

A reconfigurable analog VLSI neural network architecture with non-linear synapses.

Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle, R. Stratta, Emanuele Trucco

Int. J. Circuit Theory Appl., 1998

1997

An Analog VLSI Computational Engine for Early Vision Tasks.

Giacomo M. Bisio, Gian Marco Bo, M. Confalone, Luigi Raffo, Silvio P. Sabatini, M. P. Zizola

Proceedings of the Artificial Neural Networks, 1997

A Hardware Implementation of Hierarchical Neural Networks for Real-Time Quality Contol Systems in Industrial Applications.

Daniela Baratta, Gian Marco Bo, Daniele D. Caviglia, Maurizio Valle, Giovanni Canepa, Riccardo Parenti, Carla Penno

Proceedings of the Artificial Neural Networks, 1997