Giacomo Valente
Orcid: 0000-0002-0155-3788Affiliations:
- University of L'Aquila, Italy
According to our database1,
Giacomo Valente
authored at least 34 papers
between 2015 and 2024.
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Bibliography
2024
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection.
IEEE Embed. Syst. Lett., June, 2024
Invited Paper: On the Granularity of Bandwidth Regulation in FPGA-Based Heterogeneous Systems on Chip.
Proceedings of the 22nd International Workshop on Worst-Case Execution Time Analysis, 2024
2023
Comput. Electr. Eng., September, 2023
Fine-Grained QoS Control via Tightly-Coupled Bandwidth Monitoring and Regulation for FPGA-based Heterogeneous SoCs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project.
Microprocess. Microsystems, November, 2021
ACM Trans. Embed. Comput. Syst., 2021
IEEE Embed. Syst. Lett., 2021
MONICA "On-the-Job" Technology-Enhanced Learning Environment: An Empirical Evaluation.
Proceedings of the Methodologies and Intelligent Systems for Technology Enhanced Learning, 2021
An Investigation of Dynamic Partial Reconfiguration Offloading in Hard Real-Time Systems.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
MONICA Vision: An Approach, a Model and the Interactive Tools for Cyber-Physical Systems Designers.
Proceedings of the 14th Biannual Conference of the Italian SIGCHI Chapter, 2021
2020
Work-In-Progress: Cyber-Physical Systems and Dynamic Partial Reconfiguration Scalability: opportunities and challenges.
Proceedings of the 41st IEEE Real-Time Systems Symposium, 2020
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
An ESL Methodology for HW/SW Co-Design of Monitorable Embedded Systems: the "Design for Monitorability" Project - Work-in-Progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2020
Layering the monitoring action for improved flexibility and overhead control: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2020
2019
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
2018
CC4CS: an Off-the-Shelf Unifying Statement-Level Performance Metric for HW/SW Technologies.
Proceedings of the Companion of the 2018 ACM/SPEC International Conference on Performance Engineering, 2018
Proceedings of the Companion of the 2018 ACM/SPEC International Conference on Performance Engineering, 2018
Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2018
Injecting hypervisor-based software partitions into Design Space Exploration activities considering mixed-criticality requirements.
Proceedings of the 7th Mediterranean Conference on Embedded Computing, 2018
HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems.
Proceedings of the 7th Mediterranean Conference on Embedded Computing, 2018
Criticality-driven Design Space Exploration for Mixed-Criticality Heterogeneous Parallel Embedded Systems.
Proceedings of the 9th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2018
Design Space Exploration for Mixed-Criticality Embedded Systems Considering Hypervisor-Based SW Partitions.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
2017
Proceedings of the 8th ACM/SPEC on International Conference on Performance Engineering, 2017
Proceedings of the 8th ACM/SPEC on International Conference on Performance Engineering, 2017
Simulation-Based Analysis of a Hardware Mechanism to Support Isolation in Mixed-Criticality Network on Chip.
Proceedings of the 2017 European Modelling Symposium (EMS), 2017
2016
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system.
EURASIP J. Embed. Syst., 2016
Design and validation of multi-core embedded systems under time-to-prototype and high performance constraints.
Proceedings of the 2nd IEEE International Forum on Research and Technologies for Society and Industry Leveraging a better tomorrow, 2016
Proceedings of the 24th Euromicro International Conference on Parallel, 2016
2015
Proceedings of the 12th International Workshop on Intelligent Solutions in Embedded Systems, 2015
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015