Giacomo M. Bisio

According to our database1, Giacomo M. Bisio authored at least 29 papers between 1988 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2008
Motion Interpretation Using Adjustable Linear Models.
Proceedings of the British Machine Vision Conference 2008, Leeds, UK, September 2008, 2008

2005
A man-machine communication system based on the visual analysis of dynamic gestures.
Proceedings of the 2005 International Conference on Image Processing, 2005

2003
Phase-Based Binocular Perception of Motion in Depth: Cortical-Like Operators and Analog VLSI Architectures.
EURASIP J. Adv. Signal Process., 2003

Lattice Models for Context-Driven Regularization in Motion Perception.
Proceedings of the Neural Nets, 14th Italian Workshop on Neural Nets, 2003

2001
A Cortical Architecture for the Binocular Perception of Motion-in-depth.
Proceedings of the 12th Italian Workshop on Neural Nets, 2001

A Hierarchical Model of Complex Cells in Visual Cortex for the Binocular Perception of Motion-in-Depth.
Proceedings of the Advances in Neural Information Processing Systems 14 [Neural Information Processing Systems: Natural and Synthetic, 2001

2000
Recovering 3-D Egomotion Parameters from Optic Flow: From Structural Principles to Analog Architectures.
Proceedings of the Fifth International Workshop on Computer Architectures for Machine Perception (CAMP 2000), 2000

1998
Analog VLSI circuits as physical structures for perception in early visual tasks.
IEEE Trans. Neural Networks, 1998

Analogue VLSI primitives for perceptual tasks in machine vision.
Neural Comput. Appl., 1998

1997
Design of an ASIP architecture for low-level visual elaborations.
IEEE Trans. Very Large Scale Integr. Syst., 1997

Functional Periodic Intracortical Couplings Induced by Structured Lateral Inhibition in a Linear Cortical Network.
Neural Comput., 1997

An Analog VLSI Computational Engine for Early Vision Tasks.
Proceedings of the Artificial Neural Networks, 1997

1996
A VLSI Image Processing Architecture Dedicated to Real-Time Quality Control Analysis in an Industrial Plant.
Real Time Imaging, 1996

A recurrent neural architecture mimicking cortical preattentive vision systems.
Neurocomputing, 1996

A programmable VLSI architecture based on multilayer CNN paradigms for real-time visual processing.
Int. J. Circuit Theory Appl., 1996

An Architectural Mechanism for Direction-tuned Cortical Simple Cells: The Role of Mutual Inhibition.
Proceedings of the Advances in Neural Information Processing Systems 9, 1996

1995
A neuromorphic architecture for cortical multilayer integration of early visual tasks.
Mach. Vis. Appl., 1995

A linear rotation based solution of large systems on a transputer array.
Microprocess. Microsystems, 1995

An ASIC design for real-time image processing in industrial applications.
Proceedings of the 1995 European Design and Test Conference, 1995

1993
A neural network architectural model of visual cortical cells for texture segregation.
Proceedings of International Conference on Neural Networks (ICNN'88), San Francisco, CA, USA, March 28, 1993

1992
Optimization strategies in symbolic compaction.
Proceedings of the Synthesis for Control Dominated Circuits, 1992

1991
Symbolic generation of constrained random logic cells.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

A VLSI Module for Analog Adaptive Neural Architectures.
Proceedings of the VLSI 91, 1991

1990
Effects of weight discretization on the back propagation learning method: algorithm design and hardware realization.
Proceedings of the IJCNN 1990, 1990

Pre-placement of VLSI blocks through learning neural networks.
Proceedings of the European Design Automation Conference, 1990

1989
High efficiency solution of triangular system equations on a 2-D array of transputers.
Microprocess. Microprogramming, 1989

Neural networks on a transputer array.
Proceedings of the IEEE International Conference on Acoustics, 1989

1988
A behavioural simulator and its use for the validation of hypercube architectures.
Microprocess. Microprogramming, 1988

Mapping linear algebra algorithms into array processors: a case study.
Proceedings of the IEEE International Conference on Acoustics, 1988


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