Giacomo Gabrielli

According to our database, Giacomo Gabrielli authored at least 15 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2024

OptiWISE: Combining Sampling and Instrumentation for Granular CPI Analysis.

Yuxin Guo, Alexandra W. Chadwick, Márton Erdos, Utpal Bora, Ilias Vougioukas, Giacomo Gabrielli, Timothy M. Jones

Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2024

2022

Industrial Challenge 2022: A High-Performance Real-Time Case Study on Arm.

Matteo Andreozzi, Giacomo Gabrielli, Balaji Venu, Giacomo Travaglini

Proceedings of the 34th Euromicro Conference on Real-Time Systems, 2022

2021

Loopapalooza: Investigating Limits of Loop-Level Parallelism with a Compiler-Driven Approach.

Ali Mustafa Zaidi, Konstantinos Iordanou, Mikel Luján, Giacomo Gabrielli

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Speculative Vectorisation with Selective Replay.

Peng Sun, Giacomo Gabrielli, Timothy M. Jones

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2017

The ARM Scalable Vector Extension.

Nigel Stephens, Stuart Biles, Matthias Boettcher, Jacob Eapen, Mbou Eyole, Giacomo Gabrielli, Matt Horsnell, Grigorios Magklis, Alejandro Martinez, Nathanaël Prémillieu, Alastair Reid, Alejandro Rico, Paul Walker

IEEE Micro, 2017

2014

Advanced SIMD: Extending the reach of contemporary SIMD architectures.

Matthias Boettcher, Bashir M. Al-Hashimi, Mbou Eyole, Giacomo Gabrielli, Alastair Reid

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

MALEC: a multiple access low energy cache.

Matthias Boettcher, Giacomo Gabrielli, Bashir M. Al-Hashimi, Danny Kershaw

Proceedings of the Design, Automation and Test in Europe, 2013

2010

Performance and power optimizations for non-uniform cache memories.

Giacomo Gabrielli

PhD thesis, 2010

Way adaptable D-NUCA caches.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

Int. J. High Perform. Syst. Archit., 2010

2009

Impact of on-chip network parameters on nuca cache performances.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

IET Comput. Digit. Tech., 2009

A power-efficient migration mechanism for D-NUCA caches.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Performance Sensitivity of NUCA Caches to On-Chip Network Parameters.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008

Leveraging Data Promotion for Low Power D-NUCA Caches.

Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete, Per Stenström

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

Improving power efficiency of D-NUCA caches.

Alessandro Bardine, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete, Per Stenström

SIGARCH Comput. Archit. News, 2007

Analysis of static and dynamic energy consumption in NUCA caches: initial results.

Alessandro Bardine, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete

Proceedings of the 2007 workshop on MEmory performance, 2007