Ghislain Roquier

According to our database1, Ghislain Roquier authored at least 23 papers between 2006 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2015
Actor Merging for Dataflow Process Networks.
IEEE Trans. Signal Process., 2015

2014
High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platforms.
J. Real Time Image Process., 2014

2013
Methods to explore design space for MPEG RMC codec specifications.
Signal Process. Image Commun., 2013

Live demonstration: High level software and hardware synthesis of dataflow programs.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Static and quasi-static compositions of stream processing applications from dynamic dataflow programs.
Proceedings of the IEEE International Conference on Acoustics, 2013

Modeling control tokens for composition of CAL actors.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Design space exploration and implementation of RVC-CAL applications using the TURNUS framework.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2012
Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs.
J. Electr. Comput. Eng., 2012

Scheduling of dynamic dataflow programs based on state space analysis.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

2011
Software Code Generation for the RVC-CAL Language.
J. Signal Process. Syst., 2011

Synthesizing Hardware from Dataflow Programs - An MPEG-4 Simple Profile Decoder Case Study.
J. Signal Process. Syst., 2011

Methodology for the hardware/software co-design of dataflow programs.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Scheduling of dynamic dataflow programs with model checking.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Hardware/software co-design of dataflow programs for reconfigurable hardware and multi-core platforms.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
RVC: A multi-decoder CAL Composer tool.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

2009
Reconfigurable video coding on multicore.
IEEE Signal Process. Mag., 2009

An Integrated Environment for HW/SW Co-design based on a CAL Specification and HW/SW Code Generators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
Automatic software synthesis of dataflow program: An MPEG-4 simple profile decoder case study.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Code generation for the MPEG Reconfigurable Video Coding framework: From CAL actions to C functions.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008

Software synthesis of CAL actors for the MPEG reconfigurable Video Coding framework.
Proceedings of the International Conference on Image Processing, 2008

2007
Framework for efficient cosimulation and fast prototyping on multi-components with AAA methodology: LAR codec study case.
Proceedings of the 15th European Signal Processing Conference, 2007

2006
Using RTOS in the AAA methodology automatic executive generation.
Proceedings of the 14th European Signal Processing Conference, 2006


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