Gert Schley

According to our database, Gert Schley authored at least 11 papers between 2010 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

Cross-layer fault tolerance in networks-on-chip.

Gert Schley

PhD thesis, 2018

2017

Multi-Layer Diagnosis for Fault-Tolerant Networks-on-Chip.

Gert Schley, Atefe Dalirsani, Marcus Eggenberger, Nadereh Hatami, Hans-Joachim Wunderlich, Martin Radetzki

IEEE Trans. Computers, 2017

2016

Reconfigurable fault tolerant routing for networks-on-chip with logical hierarchy.

Gert Schley, Ibrahim Ahmed, Muhammad Afzal, Martin Radetzki

Comput. Electr. Eng., 2016

2015

Fault Tolerant Routing for Hierarchically Organized Networks-on-Chip.

Gert Schley, Martin Radetzki

Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

2014

On Covering Structural Defects in NoCs by Functional Tests.

Atefe Dalirsani, Nadereh Hatami, Michael E. Imhof, Marcus Eggenberger, Gert Schley, Martin Radetzki, Hans-Joachim Wunderlich

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013

Optimal placement of vertical connections in 3D Network-on-Chip.

Thomas Canhao Xu, Gert Schley, Pasi Liljeberg, Martin Radetzki, Juha Plosila, Hannu Tenhunen

J. Syst. Archit., 2013

Fault Localizing End-to-End Flow Control Protocol for Networks-on-Chip.

Gert Schley, Nikolaos Batzolis, Martin Radetzki

Proceedings of the 21st Euromicro International Conference on Parallel, 2013

2011

Optimal distribution of privileged nodes in networks-on-chip.

Gert Schley, Martin Radetzki

Proceedings of the Ninth Workshop on Intelligent Solutions in Embedded Systems, 2011

Practical embedded systems engineering syllabus for graduate students with multidisciplinary backgrounds.

Bastian Haetzer, Gert Schley, Rauf Salimi Khaligh, Martin Radetzki

Proceedings of the 6th Workshop on Embedded Systems Education, 2011

2010

Fault Tolerant Network on Chip Switching With Graceful Performance Degradation.

Adán Kohler, Gert Schley, Martin Radetzki

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Degradability Enabled Routing for Network-on-Chip Switches (Routingverfahren zur Unterstützung der Degradierbarkeit von Network-on-Chip Switches).

Gert Schley, Martin Radetzki, Adán Kohler

it Inf. Technol., 2010