Gerry R. Talbot

According to our database, Gerry R. Talbot authored at least 3 papers between 2010 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processors.

Bruce Andrew Doyle, Alvin Leng Sun Loke, Sanjeev K. Maheshwari, Charles Lin Wang, Dennis Michael Fischette, Jeffrey G. Cooper, Sanjeev K. Aggarwal, Tin Tin Wee, Chad O. Lackey, Harishkumar S. Kedarnath, Michael M. Oshima, Gerry R. Talbot, Emerson S. Fang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010

An Embedded All-Digital Circuit to Measure PLL Response.

Dennis Michael Fischette, Alvin Leng Sun Loke, Richard Joseph DeSantis, Gerry R. Talbot

IEEE J. Solid State Circuits, 2010

A 45nm SOI-CMOS dual-PLL processor clock system for multi-protocol I/O.

Dennis Michael Fischette, Alvin Leng Sun Loke, Michael M. Oshima, Bruce Andrew Doyle, Roland Bakalski, Richard Joseph DeSantis, Anand Thiruvengadam, Charles Lin Wang, Gerry R. Talbot, Emerson S. Fang

Proceedings of the IEEE International Solid-State Circuits Conference, 2010