Gerd Ritter

According to our database, Gerd Ritter authored at least 8 papers between 1999 and 2001.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2001

Formal sequential equivalence checking of digital systems by symbolic simulation.

Gerd Ritter

PhD thesis, 2001

Symbolic simulation techniques-state-of-the-art and applications.

Claudia Blank, Hans Eveking, Jens Levihn, Gerd Ritter

Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, 2001

2000

Formale Verifikation der Register-Allokation.

Claudia Blank, Gerd Ritter, Holger Hinrichsen, Hans Eveking

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February 28, 2000

Sequential Equivalence Checking by Symbolic Simulation.

Gerd Ritter

Proceedings of the Formal Methods in Computer-Aided Design, Third International Conference, 2000

1999

Automatische Synthese und Verifikation von RISC-Prozessoren.

Holger Hinrichsen, Gerd Ritter, Hans Eveking

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1999

Automatic Verification of Scheduling Results in High-Level Synthesis.

Hans Eveking, Holger Hinrichsen, Gerd Ritter

Proceedings of the 1999 Design, 1999

Formal Verification of Designs with Complex Control by Symbolic Simulation.

Gerd Ritter, Hans Eveking, Holger Hinrichsen

Proceedings of the Correct Hardware Design and Verification Methods, 1999

Formal Verification of Descriptions with Distinct Order of Memory Operations.

Gerd Ritter, Holger Hinrichsen, Hans Eveking

Proceedings of the Advances in Computing Science, 1999