Gerard Villar Pique

According to our database, Gerard Villar Pique authored at least 13 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A 0.9V Rail-to-Rail Ultra-Low-Power Fully Integrated Clock Generator Achieving 23fJ/Cycle in 28nm CMOS.

Sander Derksen, Maël Demarets, Gerard Villar Pique, Fabio Sebastiano

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2021

An Automotive-Grade Monolithic Masterless Fault-Tolerant Hybrid Dickson DC-DC Converter for 48-V Multi-Phase Applications.

Mojtaba Ashourloo, Venkata Raghuram Namburi, Gerard Villar Pique, John Pigott, Henk Jan Bergveld, Alaa El Sherif, Olivier Trescases

IEEE J. Solid State Circuits, 2021

17.2 A Masterless Fault-Tolerant Hybrid Dickson Converter with 95.3% Peak Efficiency 20V-to-60V Input and 3.3V Output for 48V Multi-Phase Automotive Applications.

Mojtaba Ashourloo, Venkata Raghuram Namburi, Gerard Villar Pique, John Pigott, Henk Jan Bergveld, Alaa El Sherif, Olivier Trescases

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2018

Session 24 overview: GaN drivers and converters: Power management subcommittee.

Yogesh K. Ramadass, Gerard Villar Pique, Axel Thomsen

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

F1: Integrated voltage regulators for SoC and emerging IoT systems.

Makoto Takamiya, Yogesh K. Ramadass, Keith A. Bowman, Gerard Villar Pique, Shuichi Nagai, Dennis Sylvester

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Session 10 overview: DC-DC converters.

Hoi Lee, Gerard Villar Pique, Axel Thomsen

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2015

A Light-Load-Efficient 11/1 Switched-Capacitor DC-DC Converter With 94.7% Efficiency While Delivering 100 mW at 3.3 V.

Hans Meyvaert, Gerard Villar Pique, Ravi Karadi, Henk Jan Bergveld, Michiel S. J. Steyaert

IEEE J. Solid State Circuits, 2015

A 1W 8-ratio switched-capacitor boost power converter in 140nm CMOS with 94.5% efficiency, 0.5mm thickness and 8.1mm² PCB area.

Gerard Villar Pique, Henk Jan Bergveld, Ravi Karadi

Proceedings of the Symposium on VLSI Circuits, 2015

20.1 A light-load-efficient 11/1 switched-capacitor DC-DC converter with 94.7% efficiency while delivering 100mW at 3.3V.

Hans Meyvaert, Gerard Villar Pique, Ravi Karadi, Henk Jan Bergveld, Michiel Steyaert

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

Digital Systems Power Management for High Performance Mixed Signal Platforms.

Ajay Kapoor, Cas Groot, Gerard Villar Pique, Hamed Fatemi, Juan Diego Echeverri, Leo Sevat, Maarten Vertregt, Maurice Meijer, Vibhu Sharma, Yu Pu, José Pineda de Gyvez

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

4.8 3-phase 6/1 switched-capacitor DC-DC boost converter providing 16V at 7mA and 70.3% efficiency in 1.1mm³.

Ravi Karadi, Gerard Villar Pique

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012

A 41-phase switched-capacitor power converter with 3.8mV output ripple and 81% efficiency in baseline 90nm CMOS.

Gerard Villar Pique

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011

A 350nA voltage regulator for 90nm CMOS digital circuits with Reverse-Body-Bias.

Gerard Villar Pique, Maurice Meijer

Proceedings of the 37th European Solid-State Circuits Conference, 2011