Gerald E. Sobelman

IEEE Internet Things J., April, 2024

2023

Scaled Quantization for the Vision Transformer.

[BibT_eX]

[DOI]

CoRR, 2023

2022

An Efficient CNN Accelerator for Low-Cost Edge Systems.

[BibT_eX]

[DOI]

Kyubaik Choi

ACM Trans. Embed. Comput. Syst., 2022

The Class Algorithm: Evolution Based on Division of Labor and Specialization.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Internet of Things and Intelligence Systems, 2022

2021

Simpler and Enhanced Multifactorial Evolutionary Algorithms for Continuous Optimization Tasks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Internet of Things and Intelligence Systems, 2021

2020

Wireless Beam Modulation: An Energy- and Spectrum-Efficient Communication Technology for Future Massive IoT Systems.

[BibT_eX]

[DOI]

IEEE Wirel. Commun., 2020

Hybrid Beamforming/Combining for Millimeter Wave MIMO: A Machine Learning Approach.

[BibT_eX]

[DOI]

IEEE Trans. Veh. Technol., 2020

Optimized Face Detection and Alignment for Low-Cost and Low-Power IoT Systems.

[BibT_eX]

[DOI]

Kyubaik Choi

Proceedings of the IEEE International Conference on Internet of Things and Intelligence System, 2020

2019

Adaptive Directional Lifting Wavelet Transform VLSI Architecture.

[BibT_eX]

[DOI]

Sangho Yun

Xiaofang Zhou

J. Signal Process. Syst., 2019

Memory Segment Matching Network Based Image Geo-Localization.

[BibT_eX]

[DOI]

IEEE Access, 2019

Deep Tree Search Based Pilot Efficiency Semi-Blind Channel Estimation for Massive IoT.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Conference on Internet of Things and Intelligence System, 2019

Genetic Architecture Search for Binarized Neural Networks.

[BibT_eX]

[DOI]

Xiaofang Zhou

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

Energy-Efficient Architecture for FPGA-based Deep Convolutional Neural Networks with Binary Weights.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

2017

Hardware Efficient Massive MIMO Detector Based on the Monte Carlo Tree Search Method.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2017

A low complexity SCMA detector based on stochastic computation.

[BibT_eX]

[DOI]

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Stochastic computing implementation of trigonometric and hyperbolic functions.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

Network-on-Chip for Turbo Decoders.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

Cascaded Network Body Channel Model for Intrabody Communication.

[BibT_eX]

[DOI]

Hao Wang

Xian Tang

Oliver Chiu-sing Choy

IEEE J. Biomed. Health Informatics, 2016

An Intra-Iterative Interference Cancellation Detector for Large-Scale MIMO Communications Based on Convex Optimization.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Sparse Code Multiple Access Decoding Based on a Monte Carlo Markov Chain Method.

[BibT_eX]

[DOI]

IEEE Signal Process. Lett., 2016

Improved design of digital 1-D and 2-D notch filters using general feedback structure.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015

Hardware Efficient Mixed Radix-25/16/9 FFT for LTE Systems.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Stochastic Iterative MIMO Detection System: Algorithm and Hardware Design.

[BibT_eX]

[DOI]

Jienan Chen

Jianhao Hu

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A low complexity algorithm and architecture for MIMO detection without QR decomposition.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

Network-coding-based distributed relay scheme for PLC networks.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014

Stochastic MIMO Detector Based on the Markov Chain Monte Carlo Algorithm.

[BibT_eX]

[DOI]

Jienan Chen

Jianhao Hu

IEEE Trans. Signal Process., 2014

A database-driven Ant Colony Algorithm for PLC networking.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2014

High performance MIMO detector based on bidirectional path preserving trellis search.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Iterative Computation of FIR MIMO MMSE-DFE With Flexible Complexity-Performance Tradeoff.

[BibT_eX]

[DOI]

Jing Wang

Yi Jiang

IEEE Trans. Signal Process., 2013

Scaling, Offset, and Balancing Techniques in FFT-Based BP Nonbinary LDPC Decoders.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2013

Low complexity state metric compression technique in turbo decoder.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2013

FFT design for OFDM-based cognitive radio using a reconfigurable baseband processing architecture.

[BibT_eX]

[DOI]

Proceedings of the IEEE 10th International Conference on ASIC, 2013

A gradient-controlled proportionate technique for acoustic echo cancellation.

[BibT_eX]

[DOI]

Proceedings of the 2013 Asilomar Conference on Signals, 2013

A gradient-controlled improved proportionate multi-delay filter.

[BibT_eX]

[DOI]

Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012

Generic Mixed-Radix FFT Pruning.

[BibT_eX]

[DOI]

IEEE Signal Process. Lett., 2012

A novel hardware-oriented decoding algorithm for non-binary LDPC codes.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011

A Reduced-Complexity Architecture for LDPC Layered Decoding Schemes.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2011

Reconfigurable baseband processing architecture for communication.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2011

A high-throughput LDPC decoder architecture for high-rate WPAN systems.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

General lattice wave digital filter with phase compensation scheme.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

FFT implementation with Multi-operand floating point units.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

Wideband spectrum sensing using the all-phase FFT.

[BibT_eX]

[DOI]

Lian Huai

Xiaofang Zhou

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010

Bus Energy Consumption for Multilevel Signals.

[BibT_eX]

[DOI]

Fakhrul Zaman Rokhani

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Implementations of FFT and STBD for MIMO-OFDM on a Reconfigurable Baseband Platform.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2010

Frequency domain adaptive tap partial update adaptive algorithm for network echo cancellation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2010

Novel and flexible Complex Coefficient Linear phase IIR filters for communications.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

Memory size reduction for LDPC layered decoders.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

Sparse LMS with segment zero attractors for adaptive estimation of sparse signals.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

Technical program co-chairs' message.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009

Gradient-based target localization in robotic sensor networks.

[BibT_eX]

[DOI]

Qingquan Zhang

Tian He

Pervasive Mob. Comput., 2009

Mesh-star Hybrid NoC Architecture with CDMA Switch.

[BibT_eX]

[DOI]

Woojoon Lee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Optimality of Bus-Invert Coding.

[BibT_eX]

[DOI]

Fakhrul Zaman Rokhani

John C. Kieffer

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Adaptive quantization in min-sum based irregular LDPC decoder.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Cscan: A Correlation-based Scheduling Algorithm for Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Networking, Sensing and Control, 2008

An Efficient Multi-protocol RFID Interrogator Baseband Processor based on a Reconfigurable Architecture.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Software and Systems, 2008

A heterogeneous reconfigurable baseband architecture for wireless LAN transceivers.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Conference on Electro/Information Technology, 2008

Reconfigurable baseband processing platform for communication systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Flexible LDPC decoder architecture for high-throughput applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

High Speed Look-Ahead LMS Detector for MIMO Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

MIMO Transceiver Design Based on a Modified Geometric Mean Decomposition.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Implementation of a Multi-band Pulsed-OFDM Transceiver.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 2006

TwinsNet: A Cooperative MIMO Mobile Sensor Network.

[BibT_eX]

[DOI]

Proceedings of the Ubiquitous Intelligence and Computing, Third International Conference, 2006

Gradient-Driven Target Acquisition in Mobile Wireless Sensor Networks.

[BibT_eX]

[DOI]

Qingquan Zhang

Tian He

Proceedings of the Mobile Ad-hoc and Sensor Networks, Second International Conference, 2006

Network-on-chip link analysis under power and performance constraints.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

NIUGAP: low latency network interface architecture with Gray code for networks-on-chip.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Network-on-chip quality-of-service through multiprotocol label switching.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Modeling and verification of high-speed wired links with Verilog-AMS.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Noise Model Analysis of Optimized Mixed-Radix Structures for Pulsed OFDM.

[BibT_eX]

[DOI]

Kai-Chuan Chang

Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006

Hardware channel model for ultra wideband systems.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Low-Power Bus Transform Coding for Multilevel Signals.

[BibT_eX]

[DOI]

Fakhrul Zaman Rokhani

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

FPGA-Based Design of a Pulsed-OFDM System.

[BibT_eX]

[DOI]

Kai-Chuan Chang

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

Parallel FFT computation with a CDMA-based network-on-chip.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Clock and data recovery with adaptive loop gain for spread spectrum SerDes applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

FPGA-Based CDMA Switch for Networks-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004

VLSI Design Of Digit-Serial FPGA Architecture.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2004

Simultaneous bidirectional PAM-4 link with built-in self-test.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

Design techniques for Pulsed Static CMOS.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Simultaneous bidirectional signaling with adaptive pre-emphasis.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Analysis of higher-order N-tone sigma-delta modulators for ultra wideband communications.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Performance of N-tone sigma-delta modulators for UWB-OFDM.

[BibT_eX]

[DOI]

Proceedings of IEEE International Conference on Communications, 2004

2003

Performance evaluation and optimal design for FPGA-based digit-serial DSP functions.

[BibT_eX]

[DOI]

Comput. Electr. Eng., 2003

2002

Efficient digit-serial FIR filters with skew-tolerant domino.

[BibT_eX]

[DOI]

Sungwook Kim

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A robust self-resetting CMOS 32-bit parallel adder.

[BibT_eX]

[DOI]

Gunok Jung

V. A. Sundarajan

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

High-speed add-compare-select units using locally self-resetting CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

Digit-serial modular multiplication using skew-tolerant domino CMOS.

[BibT_eX]

[DOI]

Sungwook Kim

Proceedings of the IEEE International Conference on Acoustics, 2001

High-speed CORDIC implementations using advanced circuit techniques.

[BibT_eX]

[DOI]

Gunok Jung

Seonki Kim

Proceedings of the IEEE International Conference on Acoustics, 2001

2000

Time borrowing in high-speed functional units using skew-tolerant domino circuits.

[BibT_eX]

[DOI]

Gunok Jung

Victoria Perepelitsa

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

ATM switch design using code division multiple access techniques.

[BibT_eX]

[DOI]

Jian Ding

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

Elliptic Curve Scalar Multiplier Design Using FPGAs.

[BibT_eX]

[DOI]

Lijun Gao

Sarvesh Shrivastava

Proceedings of the Cryptographic Hardware and Embedded Systems, 1999

1998

FPGA Logic Block Architecture for Digit-Serial DSP Applications (Abstract).

[BibT_eX]

[DOI]

Sarvesh Shrivastava

Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998

Digit-Serial DSP Library for Optimized FPGA Configuration.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997

A New Low-Voltage Full Adder Circuit.

[BibT_eX]

[DOI]

Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997

1996

Switch-level Differential Fault Simulation of MOS VLSI Circuits.

[BibT_eX]

[DOI]

VLSI Design, 1996

1995

Low-Power Multiplier Design Using Delayed Evaluation.

[BibT_eX]

[DOI]

Donovan L. Raatz

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

Cluster Partitioning Techniques for Data Path Synthesis.

[BibT_eX]

[DOI]

Chien-In Henry Chen

VLSI Design, 1994

1993

A programmable floating-point cell for systolic signal processing.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 1993

1992

Computer algebra and fast algorithms.

[BibT_eX]

[DOI]

Proceedings of the 1992 IEEE International Conference on Acoustics, 1992

1991

Design and Implementation of a Low-Cost Systolic Array System.

[BibT_eX]

[DOI]

David M. Anderson

Ross A. W. Smith

J. Circuits Syst. Comput., 1991

Simulation-based design of programmable systolic arrays.

[BibT_eX]

[DOI]

Rob Smith

Comput. Aided Des., 1991

A Mixed Functional/IDDQ Testing Methodology for CMOS Transistor Faults.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

Algorithms for Fast, Memory Efficient Switch-Level Fault Simulation.

[BibT_eX]

[DOI]

Proceedings of the 28th Design Automation Conference, 1991

1990

Design and programming of a flexible, cost-effective systolic array cell for digital signal processing.

[BibT_eX]

[DOI]

Ross A. W. Smith

M. Dillion

IEEE Trans. Acoust. Speech Signal Process., 1990

Fast Switch-Level Fault Simulation Using Functional Fault Modeling.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989

FPC: a floating-point processor controller chip for systolic signal processing.

[BibT_eX]

[DOI]

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

An efficient approach to pseudo-exhaustive test generation for BIST design.

[BibT_eX]

[DOI]

Chien-In Henry Chen

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

1988

SAC: a systolic array controller chip.

[BibT_eX]

[DOI]

Ross A. W. Smith

Mike Dillon

Proceedings of the IEEE International Conference on Acoustics, 1988

1986

Automated layout synthesis in the YASC silicon compiler.

[BibT_eX]

[DOI]

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1985

Yet another silicon compiler.

[BibT_eX]

[DOI]

David E. Krekelberg